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trouble with RMII2 not working

dan mcgee
Prodigy 40 points

Other Parts Discussed in Thread: AM3359

could you tell me what i'm overlooking!

-          Using AM335x rev 2 silicon, booting from sd card.

-          Having problems with Ethernet (cpsw) not sending or receiving data. Txen and tx always low, not seeing rx interrupts.

-          Phy is smsc 8720a RMII mode, rx data and RMII2_CRS_DV is active when receiving data. MDIO interface is working. Sourcing 50MHz to mii1_col mode(1) RMII2_REFCLK.

-          MUX configure RMII2 for u-boot

  • static const struct module_pin_mux rmii2_pin_mux[] = {
  •     {OFFSET(gpmc_a0), MODE(3)},           /* RMII2_TXEN -- */
  •     {OFFSET(gpmc_a4), MODE(3)},           /* RMII2_TXD1 -- */
  •     {OFFSET(gpmc_a5), MODE(3)},           /* RMII2_TXD0 -- */
  •     {OFFSET(gpmc_a10), MODE(3) | RXACTIVE},    /* RMII2_RXD1 -- */
  •     {OFFSET(gpmc_a11), MODE(3) | RXACTIVE},    /* RMII2_RXD0 --  */
  •     {OFFSET(gpmc_csn3), MODE(2) | RXACTIVE},     /* RMII2_CRS_DV */
  •     {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
  •     {OFFSET(mdio_clk), MODE(0) | PULLUP_EN},    /* MDIO_CLK */
  •     {OFFSET(mii1_col), MODE(1) | RXACTIVE}, /* RMII2_REFCLK  50MHz source from phy*/
  •     {-1},
  • };

-          GMII_SEL set to 0x85 RMII Reference Clock Input mode. rmii2_io_clk_en, 01: Port1 and Port2 RMII Mode.

-          SMA2 set to 0x0, select MMC2_DAT7_MUX0 on GPMC_A9.

MACCONTROL – BIT(16), BIT(15), BIT(0). 100mbs full duplex

  • 0
    Intellectual 775 points

    You are probably setting things up correctly. Double check those pin assignments, but I bet you are OK.

    My problem was hardware, I was using a system-on-module from a company called phytec, and they had left a mux chip off their board that muxed one of the rmii signals with some SPI memory. In fact, I went through the forums history and in EVERY case I found where the second phy was not working, it was ultimately some kind of a hardware issue (after people found out about the internal PLL issue).

  • 0 in reply to Nick Wernicke
    Prodigy 40 points

    thanks,  u-boot is working with rmii2 mode. Had a problem with txd0 and txd1 miss wired.

    But now the kernel will not send or receive in rmii2 mode. I've made the changed to gmii_sel 0xf5 and ifconfig show tx counter incrementing. but no data on the tx lines.

    Can you think of another changes?

  • 0 in reply to dan mcgee
    Prodigy 10 points

    In the interest of assisting one of our customers as quickly as possible we would like to point to a forum post from this customer on our own platform specific (MityARM-335x) forum. Detailed log files have been posted outlining the current issues being experienced with the RMII based phy when booted into the Linux kernel.

    http://support.criticallink.com/redmine/boards/28/topics/3280

    Our engineering team is working on this issue but of course if another community (or TI) member has some insight it would be great if we are able to speed the resolution time.

    Alex Block of Critical Link

  • 0 in reply to Alexander Block
    TI__Mastermind 27890 points

    I reviewed the Linux logs and the first thing that stood out to me is that the PHY reports you are connected at 100/half duplex. Are you actually connected at half duplex (rare), or did the PHY fail to correctly negotiate with the link partner? I'd suggest dumping the PHY registers via the AM335x PHY user access registers to see what is going on with the PHY itself as many PHYs provide detailed connection and error information via proprietary register sets that may point to the issue.

    How are you clocking the PHY-MAC interface? Shared 50MHz oscillator or a PHY-generated 50MHz to the MAC?

    Is the pinmux the same in UBoot and Linux? The fact that the CPSW_STATS register is incrementing without any physical activity on the TX pins would have me looking here first.

  • 0 in reply to -DK-
    Prodigy 40 points

    this is working now. your are right, this is a pin mux conflict within the kernel. thanks for the support

  • 0 in reply to dan mcgee
    Intellectual 470 points

    Hi,dan

    Can you tell me which files I should check for the pinmux conflict.

    I use the rmii2 interface to connect the phy,I think I do the correct configuration but it doesn't work in uboot,the all

    TX pins of AM3359 don't have any data tranmission.

    I suspect there has any pinmux conflict,but I don't know which files I should check.I just check the board.c and mux.c in uboot.

  • 0 in reply to ge zhiming
    Intellectual 775 points

    @^^

    I don't know which kernel version you are using, but if it is pre-3.8, I think the pinmux file might be in linuxX.X/arch/arm/mach-omap2/board-type.c. It is on my linux computer. mux33xx.c is in the same folder.

    If it is post 3.8, then you have to use device tree.

  • 0 in reply to Nick Wernicke
    Intellectual 470 points

    Thank you for your replay.

    My linux kernel version is 3.2,now I try it in uboot-2013.01.01-ps06.00.00.00

    Do you know the what files  pinmux  locate?

  • 0
    Intellectual 470 points

    Hi,Dan

    I'm using AM3359 connect to the PHY Lan8710a through RMII2.

    I done the RMII2 pinmux and configured the GMII_SEL register in uboot-2013.01.01

    can you tell me where I configure the MAC_CONTROL in uboot and have there any configure I should do?