PinMux for GPMC access to 2MB (16-bit wide) SRAM

K H Tang

8726.PinMuxDesignState_AM335x Rev 2.x 2MB SRAM access.dat

Hi team,

I need to connect to an external SRAM of 2MB (16-bit wide). I read about other similar posts but still am not sure about the answer. Can someone verity the attached GPMC is correct?

In the post http://e2e.ti.com/support/arm/sitara_arm/f/791/t/251339.aspx, it says GPMC_A1, GPMC_A2 etc can be used as A17, A18, etc. Are these done automatically or need to be configured in software? If yes, please point me the direction of where and how to configure.

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Hi Tang,

Please check Table 7-5 in the AM335X TRM Rev. J. I suppose you are using 16-bit A/D multiplexed mode. When this mode is set A16 will be output on pin GPMC_A1 and so on. You simply need to pinmux the pin to its GPMC_A1 mode, the GPMC controller takes care of the correct address output. Keep in mind Note 1 below the table - addresses in this table start from A0, but this will actually be A1 for a 16-bit device.

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

Thanks for the quick reply. Why didn't I see it? I actually highlighted that column myself.

Am I right to assume that "gpmc_a16_muxN" pins multiplex the same gpmc_a16 signals on different pins? If so, are they software configurable? Or when selected, they will do it automatically by the hardware?

0 Biser Gatchev-XID over 11 years ago in reply to K H Tang

TI__Guru**** 393215 points

I don't understand what you mean by "gpmc_a16_muxN" pins?

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

Sorry I should have been more precise.

For instance:

- ball K15 has Mode 3 of "uart4_txd_mux0"

- ball E17 has Mode 1 of "uart4_txd_mux1"

- ball U17 has Mode 6 of "uart4_txd_mux2"

Are uart4_txd signal multiplexed to these pins when selected?

Also, can I pick-and-mix signals from different "mux"? For example uart_txd_mux1 with uart_rxd_mux0, etc, will they work?

0 Biser Gatchev-XID over 11 years ago in reply to K H Tang

TI__Guru**** 393215 points

You should use only the predefined I/O sets (or subsets from them) in the Pinmux tool. These have been timing verified. Any other combinations are not guaranteed to have required timings and will raise "IO Set Violation" error in the Pinmux tool.

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

Hello Biser,

In 16-bit mode, if AD[0..15] is latched as A[1..16], then shouldn't GPMC_A1 be A17 instead of A16?

0 Biser Gatchev-XID over 11 years ago in reply to K H Tang

TI__Guru**** 393215 points

Yes it is. Read the Note below Table 7-5.

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

1055.AM335x to 8-bit and 16-bit bus.pdf

Hi,

Assuming I have two separate GPMC buses configured as:

CSn1: 16-bit

CSn2: 8-bit

Is the attached schematic correct? Particularly, (assuming A0 is LSB) will GPMC_AD0 be functioning as A1 in 16-bit, and A0 in 8-bit?

0 Biser Gatchev-XID over 11 years ago in reply to K H Tang

TI__Guru**** 393215 points

See Table 7-5 in the Am335X TRM Rev. J. For 8-bit mode addresses A2 - A0 are output on GPMC_A[2:0], not on the GPMC_AD[15:0] lines.

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

3404.AM335x to 8-bit and 16-bit bus Rev 2.pdf

Hi Biser,

Sorry but I have to be very sure this is the right configuration, as the manual is not as clear to me. Please help to verify this is the correct configuration. Thanks.

0 Biser Gatchev-XID over 11 years ago in reply to K H Tang

TI__Guru**** 393215 points

No, it isn't. I will try to draw over your pdf and post here.

0 Biser Gatchev-XID over 11 years ago in reply to Biser Gatchev-XID

TI__Guru**** 393215 points

Here is how it should be:

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

Hi Biser,

This is where I got confused. I initially drew it the way you suggested in the first revision, but found this inconsistency, that's why I changed but confused.

In multiplexed 16-bit Data mode, if GPMC_AD0 multiplex address A1, then GPMC_AD15 should multiplex address A16, but from Table 7-5, address A16 is output by GPMC_A1. This means I have duplicated address A16? Or GMPC_AD15 does not multiplex A16?

0 Biser Gatchev-XID over 11 years ago in reply to K H Tang

TI__Guru**** 393215 points

Please read Note 1 below Table 7-5, on page 269.

0 K H Tang over 11 years ago in reply to Biser Gatchev-XID

Intellectual 330 points

Hello Biser,

1440.AM335x to 8-bit and 16-bit bus Rev 3.pdf

Sorry but I can't correlate that with the note.

Please see the attached file. As you can see, there are two A16 signals, one produced by GPMC_AD15, and the other by GPMC_A1. This is the one the puzzles me.

Am I missing something here?