In our system, FPGA is interfaced with AM335x GPMC Controller. We are using Synchronous non multiplexed 16 bit mode to read and write in FPGA internal FIFO. As we need high throughput so, we want to use 16 word burst mode. We have following queries-
Query 1: Is there any FIFO or memory in GPMC Controller to support Burst mode for FPGA based memory device? If not then how can we support burst mode for FPGA based memory device?
Query 2: AM335x Datasheet shows the waveforms for Synchronous multiple read (4,8,16 word 16burst) (ref- 7.1.3.3.10.2.2) but Synchronous multiple write cycles (ref 7.1.3.3.10.2.4) does not specify the maximum possible burst length. is it possible to write 16 word 16 bit burst in synchronous non multiplexed mode?
