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AM437x GP EVM boot

Hello,

I am working on the IPL for AM437x GP EVM board.

AM437x GP EVM board should be GP device. Based on AM437x datasheet Chapter 5, for GP device , Public RAM for download image is from 0x402F0400. And I use this base, can download my IPL form UART successfully. But I can use this base:0x402F0400 for MMC0 boot(Note: I add 8bytes Header for Size and Destination). I checked the MMC boot MLO from TI, and found TI's MLO Destionation is from 0x40300350 (CONFIG_SPL_TEXT_BASE). Why AM437x GP use 0x40300350 (CONFIG_SPL_TEXT_BASE), not 0x402F0400?

Thanks,

Jian

   

  • Hi Jian,

    What revision is your EVM?

  • My Board is AM437x GP EVM Rev 1.4A.

    I use the base: 0x402F0400, got UART booting successfully. But using the asme base.I got MMC0 booting failed (Note: I added 8bytes GP Header of Size and Destination for MMC booting image).

    Thanks,Jian

  • How is it failing to boot from mmc? Is the MLO file getting loaded into internal RAM by the boot ROM?

    There is a bug in PG1.0 silicon where if you write anything to 0x402f0400 and beyond, the first SMC call in the kernel will hang the board. Peripheral boot expects that address. For memory boot, the header has the address so it was set to 0x40300350 so that the kernel would boot. This is fixed in PG1.2 of the silicon and the new load address is 0x402f4000. Again, that is only in PG1.2 of the silicon that it is fixed.

    Steve K.

  • I didn't use TI's Linux MLO.   I am programming the booting image with QNX OS. For UART booting image, I  compiled it to use the load base: 0x402f0400. When I downloaded this image, I can get UART0 console working and output some message.

    I think the difference between the MMC and UART booting images are the GP header. So I added the 8 bytes GP header(Size:xxxx and Destination: 0x402f0400  ) on the top of UART booting image. and changed the MMC booting image file name with "MLO", then copied to to the TI's booting SD card to instead of TI's MLO.  Then boot AM437x GP EVM board with MMC boot mode, but I can't get any UART0 console output with my MLO. Do you think if there is anything wrong with my understanding? 

    I am wondering when TI ROM x-loader copy memory booting image into target RAM(base : 0x402f0400), does it remove the GP header or not?

    Thanks a lot, Jian

         

          

  • Did you add the size and load address in Little Endian? Can you

    hexdump -C MLO | more

    and post the first few lines?

    Steve K.

  • 00000000  ec 4c 00 00 08 04 2f 40  00 00 0f e1 1f 00 c0 e3  |.L..../@........|

    00000010  d3 00 80 e3 00 f0 29 e1  00 00 a0 e3 17 0f 08 ee  |......).........|

    00000020  15 0f 07 ee 10 0f 11 ee  02 0a c0 e3 07 00 c0 e3  |................|

    00000030  02 00 80 e3 02 0b 80 e3  01 0a c0 e3 10 0f 01 ee  |................|

    00000040  04 d0 9f e5 7b 03 00 fa  ee ff ff ea fc 93 2f 40  |....{........./@|

    00000050  4f f0 02 03 43 65 03 69  13 f0 01 0f fb d1 4f f0  |O...Ce.i......O.|

    00000060  2b 03 83 63 70 47 00 bf  45 f2 48 03 c4 f2 e3 43  |+..cpG..E.H....C|

    00000070  4a f6 aa 22 1a 60 45 f2  34 02 c4 f2 e3 42 13 68  |J..".`E.4....B.h|

    00000080  00 2b fc d1 45 f2 48 03  c4 f2 e3 43 45 f2 55 52  |.+..E.H....CE.UR|

    00000090  1a 60 45 f2 34 02 c4 f2  e3 42 13 68 00 2b fc d1  |.`E.4....B.h.+..|

    000000a0  70 47 00 bf 08 b5 00 f0  cf fb ff f7 dd ff 00 f0  |pG..............|

    000000b0  93 f9 00 f0 e1 fa 49 f2  54 03 c4 f2 e0 43 1a 68  |......I.T....C.h|

    000000c0  42 f0 02 02 1a 60 41 f6  01 33 c0 f2 b7 03 49 f2  |B....`A..3....I.|

    000000d0  58 01 c4 f2 e0 41 0a 68  12 f0 01 0f 01 d1 01 3b  |X....A.h.......;|

    000000e0  f9 d1 49 f2 54 03 c4 f2  e0 43 1a 68 42 f0 08 02  |..I.T....C.hB...|

    000000f0  1a 60 4f f4 10 40 c4 f2  e0 40 4f f4 e1 31 4f f4  |.`O..@...@O..1O.|

    00000100  d8 42 c0 f2 dc 22 4f f0  10 03 03 f0 3d fd 44 f2  |.B..."O.....=.D.|

    ... ...

    Thanks a lot,

    Jian

  • Bye 4 is wrong. It should be 00 not 08. The boot ROM reads the first two words and starts loading the image to the start address, 0x402f0400.

    Steve K.

  • Based on AM437x datasheet:

    Note: the “Destination” address field stands for both:

    • Target address for the image copy from the non-XIP storage to the target XIP location (for example,

    internal RAM or SDRAM)

    • Entry point for image code

     So I thought the boot ROM starts loading the image (after the 8 bytes GP header) to the the Destination address: 0x402f0408, then excute the image code from 0x402f0408. Is that correct ?

    Thanks,

    Jian

  • No. The boot ROM will read the header into another memory area, parse the length and start address, and then the words after the first two get loaded to the start address.

    Steve K.

  • For my MLO, the start address is 0x402f0408 . The words after the 8 bytes GP header will be loaded from 0x402f0408. So I think Byte 4: 0x08  is correct :-). Does ROM loader have to load the image from 0x402f0400?

    Thanks,

    Jian  

  • Before building MLO/u-boot, did you change am43xx_evm.h so that CONFIG_SPL_TEXT_BASE is 0x402f0408? I don't think anybody has tested somethig like that.

    Steve K.