AM335x UART RX FIFO overrun at 115200bps

Sylvester Podrebersek

Other Parts Discussed in Thread: AM3352

I am debugging the serial communications over UART1 for our system and have noticed that whenever the ascii message exceeds the FIFO size (64 bytes) there is a potential for message corruption due to FIFO overrun.

For example at the Linux prompt, "cat /proc/tty/driver/OMAP-SERIAL" gives:

0: uart:OMAP UART0 mmio:0x44E09000 irq:72 tx:2625 rx:0 RTS|CTS|DTR|DSR
1: uart:OMAP UART1 mmio:0x48022000 irq:73 tx:5564808 rx:5521417 oe:436 RTS|CTS|DTR|DSR|CD|RI
2: uart:OMAP UART2 mmio:0x48024000 irq:74 tx:0 rx:0 CTS|DSR
3: uart:OMAP UART3 mmio:0x481A6000 irq:44 tx:0 rx:0 CTS|DSR
4: uart:OMAP UART4 mmio:0x481A8000 irq:45 tx:0 rx:0 CTS|DSR
5: uart:OMAP UART5 mmio:0x481AA000 irq:46 tx:0 rx:0 CTS|DSR

This shows approx. one rx overrun error in 12K bytes and a loss of ~43K bytes for tests run.

The Linux/arm kernel version is 3.2.0, which is pretty much fixed for our product development.

I noticed that DMA mode is "false" within "..\arm\mach-omap2\serial.c" but setting it "true" does not work - kernel crashes.

I assume the default serial port is running in polling mode, not even sure that FIFO interrupts are being used. Can you tell me how to setup the serial port to work without rx overrun error.

Thanks,

Sylvester.

over 10 years ago

0 Sylvester Podrebersek over 10 years ago

Prodigy 50 points

Further forgot to mention that there is loopback of the transmit into the receive - so all transmitted bytes are eventually copied to the receiver.

0 Sylvester Podrebersek over 10 years ago in reply to Sylvester Podrebersek

Prodigy 50 points

Also its important to note that there are no errors if tx pin is wired to rx pin. The errors occur if the transmit message is sent to another AM335x and the other AM335x forwards the message back.

0 Sylvester Podrebersek over 10 years ago in reply to Sylvester Podrebersek

Prodigy 50 points

A temporary workaround was implemented to add 3mec gap between every 64 bytes transmitted to UART rx FIFO. This allowed AM335x to poll, or service interrupt in-time, preventing FIFO overrun. But the throughput at 115200 baud is only about 65% of max.

0 Biser Gatchev-XID over 10 years ago in reply to Sylvester Podrebersek

TI__Guru**** 393215 points

I will ask the software team to look at this.

0 Yordan Kovachev over 10 years ago in reply to Biser Gatchev-XID

TI__Guru**** 161600 points

Hi,

Have you tried modifying the TX/RX FIFO trigger level, that are set in FCR Register? You can have a look at Section 19.3.6 FIFO Management of the TRM for details on how this bit fields are working.

Best Regards,
Yordan

0 Sylvester Podrebersek over 10 years ago in reply to Yordan Kovachev

Prodigy 50 points

Found existing setting for RX FIFO trigger level in "...\kernel\drivers\tty\serial\omap-serial.c" as UART_FCR_R_TRIG_01 (trigger on 16 chars) within serial_omap_set_termios function. What value should this be set? Is this the only place where FIFO trigger is set within driver?

Its possible to change to UART_FCR_R_TRIG_00 (trigger on 8 chars) but this would only invoke ISR 0.8msec earlier (i.e. 100usec per char @115200 baud). Since workaround inserts more than 2msec delay I don't think this will fix it.

Is there a way to get DMA mode working ?

0 STEVE HUYNH over 9 years ago in reply to Yordan Kovachev

Prodigy 180 points

Hi, we're having the same issue with am3352 (missing or corrupted characters when pasting more than 64 bytes). The kernel we're using is 3.12.10 and trigger level in omap-serial.c is UART_FCR_R_TRIG_01. What can we do to fix this in the driver? Thanks.

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AM335x UART RX FIFO overrun at 115200bps