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AM57x EMIF tool problem

Other Parts Discussed in Thread: AM5728, AM5718

Hi,

We want to determine the DDR/EMIF/PLL AM57x  registers values for the our design.  and we are following guidelines in SPRAC36 which provides instruction on using spreadsheet program – SPRAC36_EMIF_RegisterConfig_v2.xls

Ideally, the plan to have two different configurations.. 

 

Config 1)       AM5728 ( EVMs / some  KA Boards)  @ 1066MHz  Data Rate

Config 2)       AM5718 ( EVMs / some  KA Boards)  @ 1333MHz  Data Rate  ( to maximize memory bus capability)..

Our Design uses  two 4Gb  Micron Part #  MT41K256M16TW-107P , which is a 1866 speed grade part   ( Note that the CL for 1866 is 13, I will use these values later in the spreadsheet for our product )

The  TI provided spreadsheet file SPRAC36_EMIF_RegisterConfig_v2.xlsm come pre-loaded with parameters.. 

Looking at the Step 1- System detail tab, the DDR freq is 532 (Detail #6),  the speed grade  is 1006(Detail #11) and CAS Latency(Detail #14)  is 7.  – see below…

 

Going over to the  Step 3- DDR timing tab page, the  CAS Latency cell has a value of 7 ( this is the correct value for the above settings  but it can changed to 8 which is also a  valid setting).  The AM57x tool is working properly.

 

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Switching the discussion over to our specific  product  design.. and  assuming design config # 2  ( note same problem in design config #1 too) above:  AM5718 @ 1333MHz data rate .

As mentioned, our design will use Micron Part #  MT41K256M16TW-107P  , which is a 1866 speed grade part   ( Note that the CL @ 1866MHz  is 13, I will now use these values in the spreadsheet)

.  Looking at the Step 1- System detail tab page in the  spreadsheet file  SPRAC36_EMIF_RegisterConfig_v2 _SAGE_AM571x_667MHz_4Gb_rev1.xlsm  ( I am unable to attach a .xlsm file here but can email it if requested)     The DDR freq is 667 (Detail #6),  the speed bin is 1833(Detail #11) and CAS Latency(Detail #14)  is 13. for our design is entered below along with our other specifics.

 

 

 

Going over to the  Step 3- DDR timing tab page,  all of our design settings  ( DDR timing) can be changed to the proper values except for the CAS Latency which is stuck at ‘7’..    I get the window popup when I try any value other than 7 ( see picture below when I try to enter the value 9) .    Doing some experimentation, the problem seem to be related to the DDR 1866M data rate of the memery we are using.

My question is …  Is there a bug in the program in the CAS LATENCY cell operation   or did I make in a mistake in setting some other input parameter .. 

 

I can certainly work around the problem  by manually changing the  CL field in the SDRAM Config Register  0x4C00_0008

 

Thanks for your assistance in this matter.

 

Larry