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Error in device tree for custom AM335x board

Kanappilly Jacob Benny
Prodigy 80 points

Hi,

We are having a custom board very close to the BeagleBone Black. This board is making use of GPIOs to control some daughter cards:

The below has been added into the am335x-boneblack.dts file:

&am33xx_pinmux {
ws_gpio0_pins: pinmux_ws_gpio0_pins {
pinctrl-single,pins = <
0x164 ( PIN_INPUT | MUX_MODE7 ) /* (C18) eCAP0_in_PWM0_out.gpio0[7] */
0x178 ( PIN_INPUT | MUX_MODE7 ) /* (D18) uart1_ctsn.gpio0[12] */
0x17c ( PIN_INPUT | MUX_MODE7 ) /* (D17) uart1_rtsn.gpio0[13] */
0x21c ( PIN_INPUT | MUX_MODE7 ) /* (F16) USB0_DRVVBUS.gpio0[18] */
0x1b4 ( PIN_INPUT | MUX_MODE7 ) /* (D14) xdma_event_intr1.gpio0[20] */
0x20 ( PIN_INPUT | MUX_MODE7 ) /* (U10) gpmc_ad8.gpio0[22] */
0x24 ( PIN_INPUT | MUX_MODE7 ) /* (T10) gpmc_ad9.gpio0[23] */
0x28 ( PIN_INPUT | MUX_MODE7 ) /* (T11) gpmc_ad10.gpio0[26] */
0x2c ( PIN_INPUT | MUX_MODE7 ) /* (U12) gpmc_ad11.gpio0[27] */
0x144 ( PIN_INPUT | MUX_MODE7 ) /* (H18) rmii1_refclk.gpio0[29] */
>;
};

ws_gpio1_pins: pinmux_ws_gpio1_pins {
pinctrl-single,pins = <
0x30 ( PIN_INPUT | MUX_MODE7 ) /* (T12) gpmc_ad12.gpio1[12] */
0x34 ( PIN_INPUT | MUX_MODE7 ) /* (R12) gpmc_ad13.gpio1[13] */
0x38 ( PIN_INPUT | MUX_MODE7 ) /* (V13) gpmc_ad14.gpio1[14] */
0x3c ( PIN_INPUT | MUX_MODE7 ) /* (U13) gpmc_ad15.gpio1[15] */
0x40 ( PIN_INPUT | MUX_MODE7 ) /* (R13) gpmc_a0.gpio1[16] */
0x44 ( PIN_INPUT | MUX_MODE7 ) /* (V14) gpmc_a1.gpio1[17] */
0x48 ( PIN_INPUT | MUX_MODE7 ) /* (U14) gpmc_a2.gpio1[18] */
0x4c ( PIN_INPUT | MUX_MODE7 ) /* (T14) gpmc_a3.gpio1[19] */
0x50 ( PIN_INPUT | MUX_MODE7 ) /* (R14) gpmc_a4.gpio1[20] */
0x64 ( PIN_INPUT | MUX_MODE7 ) /* (U16) gpmc_a9.gpio1[25] */
0x68 ( PIN_INPUT | MUX_MODE7 ) /* (T16) gpmc_a10.gpio1[26] */
0x6c ( PIN_INPUT | MUX_MODE7 ) /* (V17) gpmc_a11.gpio1[27] */
0x78 ( PIN_INPUT | MUX_MODE7 ) /* (U18) gpmc_be1n.gpio1[28] */
0x7c ( PIN_INPUT | MUX_MODE7 ) /* (V6) gpmc_csn0.gpio1[29] */
>;
};

ws_gpio2_pins: pinmux_ws_gpio2_pins {
pinctrl-single,pins = <
0x88 ( PIN_INPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] */
0x8c ( PIN_INPUT | MUX_MODE7 ) /* (V12) gpmc_clk.gpio2[1] */
0x90 ( PIN_INPUT | MUX_MODE7 ) /* (R7) gpmc_advn_ale.gpio2[2] */
0x94 ( PIN_INPUT | MUX_MODE7 ) /* (T7) gpmc_oen_ren.gpio2[3] */
0x98 ( PIN_INPUT | MUX_MODE7 ) /* (U6) gpmc_wen.gpio2[4] */
0x9c ( PIN_INPUT | MUX_MODE7 ) /* (T6) gpmc_be0n_cle.gpio2[5] */
0xa0 ( PIN_INPUT | MUX_MODE7 ) /* (R1) lcd_data0.gpio2[6] */
0xa4 ( PIN_INPUT | MUX_MODE7 ) /* (R2) lcd_data1.gpio2[7] */
0xa8 ( PIN_INPUT | MUX_MODE7 ) /* (R3) lcd_data2.gpio2[8] */
0xac ( PIN_INPUT | MUX_MODE7 ) /* (R4) lcd_data3.gpio2[9] */
0xb0 ( PIN_INPUT | MUX_MODE7 ) /* (T1) lcd_data4.gpio2[10] */
0xb4 ( PIN_INPUT | MUX_MODE7 ) /* (T2) lcd_data5.gpio2[11] */
0xb8 ( PIN_INPUT | MUX_MODE7 ) /* (T3) lcd_data6.gpio2[12] */
0xbc ( PIN_INPUT | MUX_MODE7 ) /* (T4) lcd_data7.gpio2[13] */
0xc8 ( PIN_INPUT | MUX_MODE7 ) /* (U3) lcd_data10.gpio2[16] */
0xcc ( PIN_INPUT | MUX_MODE7 ) /* (U4) lcd_data11.gpio2[17] */
0xe0 ( PIN_INPUT | MUX_MODE7 ) /* (U5) lcd_vsync.gpio2[22] */
0xe4 ( PIN_INPUT | MUX_MODE7 ) /* (R5) lcd_hsync.gpio2[23] */
0xe8 ( PIN_INPUT | MUX_MODE7 ) /* (V5) lcd_pclk.gpio2[24] */
0xec ( PIN_INPUT | MUX_MODE7 ) /* (R6) lcd_ac_bias_en.gpio2[25] */
>;
};

&gpio0{

pinctrl-names = "default";
pinctrl-0 = <&ws_gpio0_pins>;
status = "okay";
};


&gpio1{

pinctrl-names = "default";
pinctrl-0 = <&ws_gpio1_pins>;
status = "okay";
};

&gpio2{

pinctrl-names = "default";
pinctrl-0 = <&ws_gpio2_pins>;
status = "okay";
};

However I'm getting the below error in my boot logs:

[ 0.252973] omap_gpio 44e07000.gpio: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_ws_gpio0_pins, deferring pe

[ 0.253650] omap_gpio 4804c000.gpio: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_ws_gpio1_pins, deferring pe
[ 0.254295] omap_gpio 481ac000.gpio: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_ws_gpio2_pins, deferring pe

root@WebMon:/# uname -a
Linux hexus 4.4.16 #2 SMP Mon Oct 10 23:20:23 IST 2016 armv7l GNU/Linux

1. Could you please help to identify the cause of these errors?

2.  Is this the ideal way to enable GPIOs for a custom board or is there a preferred approach?

Thanks

Benny

  • 0
    TI__Guru**** 393215 points
    The software team have been notified. They will respond directly here.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 80 points

    Hi Biser,

    Thank you for your response. I'll look ahead for the software team's response.

    Thanks

    Benny

  • 0 in reply to Kanappilly Jacob Benny
    TI__Guru 55345 points

    Hello Benny,

    1. The errors you got are expected. Please check the driver probe deferral mechanism.

    2. You can find the Processor SDK Linux GPIO HW/Driver Overview here.

    Best regards,
    Kemal

  • 0 in reply to Kemal R. Shakir
    Prodigy 80 points
    Hi Kemal,

    Thank you for the response.

    1. There isn't any Kernel driver handling the GPIOs I've set-up in the device tree. So I'm not too sure how to handle the differed probe as you mentioned.

    2. These GPIOs are operated from the user space by performing an mmap of the GPIO address map and directly working with the GPIO registers
    from the HAL layer of my application.

    3. The sole purpose of specifying the GPIO pins in the device tree is to get the mux mode (Mode 7) and to enable / disable the pull-ups.

    4. Currently I'm testing the GPIOs using the sysfs interface, but am unable to see the GPIO going high when I set the direction as output and write a logic 1.

    5. Could you please comment if this initialisation (inside am335x-boneblack.dts) is correct for a 4.4.x kernel:


    &am33xx_pinmux {
    ws_gpio0_pins: pinmux_ws_gpio0_pins {
    pinctrl-single,pins = <
    0x164 ( PIN_INPUT | MUX_MODE7 ) /* (C18) eCAP0_in_PWM0_out.gpio0[7] */
    0x178 ( PIN_INPUT | MUX_MODE7 ) /* (D18) uart1_ctsn.gpio0[12] */
    0x17c ( PIN_INPUT | MUX_MODE7 ) /* (D17) uart1_rtsn.gpio0[13] */
    0x21c ( PIN_INPUT | MUX_MODE7 ) /* (F16) USB0_DRVVBUS.gpio0[18] */
    0x1b4 ( PIN_INPUT | MUX_MODE7 ) /* (D14) xdma_event_intr1.gpio0[20] */
    0x20 ( PIN_INPUT | MUX_MODE7 ) /* (U10) gpmc_ad8.gpio0[22] */
    0x24 ( PIN_INPUT | MUX_MODE7 ) /* (T10) gpmc_ad9.gpio0[23] */
    0x28 ( PIN_INPUT | MUX_MODE7 ) /* (T11) gpmc_ad10.gpio0[26] */
    0x2c ( PIN_INPUT | MUX_MODE7 ) /* (U12) gpmc_ad11.gpio0[27] */
    0x144 ( PIN_INPUT | MUX_MODE7 ) /* (H18) rmii1_refclk.gpio0[29] */
    >;
    };



    &gpio0{

    pinctrl-names = "default";
    pinctrl-0 = <&ws_gpio0_pins>;
    status = "okay";
    };

    Thanks

    Benny
  • 0 in reply to Kanappilly Jacob Benny
    TI__Guru 55345 points
    The initialisation seems correct, you can also check whether the pin is not in use by another driver which pulls it down.
  • 0 in reply to Kemal R. Shakir
    Prodigy 80 points
    Hi Kemal,

    Thank you for the response.

    I've changed the device tree slightly to reference the custom GPIO groups ( ws_gpioN_pins) inside the am335x-boneblack.dts as:

    &mmc1 {
    vmmc-supply = <&vmmcsd_fixed>;
    pinctrl-names = "default";
    pinctrl-0 = <&emmc_pins &ws_gpio0_pins &ws_gpio1_pins &ws_gpio2_pins>;
    bus-width = <8>;
    status = "okay";
    };

    Once the ws_gpioN_pins is called from within the mmc1, the mux mode seems to be correct.

    I've verified it using the /sys/kernel/debug/pinctrl/44e10800.pinmux/pins

    Further I'm also able to set the direction and turn on / turn off the PINS.

    With the above it seems that the pin is not in use by another driver which pulls it down

    However if I reference the ws_gpioN_pins from within the GPIO controller as below I'm not able to control the GPIOs using the sysfs interface.


    &gpio0{

    pinctrl-names = "default";
    pinctrl-0 = <&ws_gpio0_pins>;
    status = "okay";
    };


    and the differed probe messages appear in the dmesg:

    [ 0.252973] omap_gpio 44e07000.gpio: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_ws_gpio0_pins, deferring pe

    [ 0.253650] omap_gpio 4804c000.gpio: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_ws_gpio1_pins, deferring pe
    [ 0.254295] omap_gpio 481ac000.gpio: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_ws_gpio2_pins, deferring pe


    Could you please comment


    Thanks

    Benny
  • 0 in reply to Kanappilly Jacob Benny
    TI__Guru 55345 points

    Right, I am not sure why but the probe deferral appear if we create separate node. If you want to pinmux without creating a separate node, you can add them to the first pinctrl-0 in &am33xx_pinmux {...};

  • 0 in reply to Kemal R. Shakir
    Prodigy 80 points

    Could you please comment if you ment something like the below:

    &am33xx_pinmux {

    pinctrl-0 = < &ws_gpio0_pins &ws_gpio1_pins &ws_gpio2_pins>;

    ws_gpio0_pins: pinmux_ws_gpio0_pins {
    pinctrl-single,pins = <

    ---------------------------------------------------------------

    ---------------------------------------------------------------

    >;
    };

  • 0 in reply to Kanappilly Jacob Benny
    TI__Guru 55345 points

    Yes.

    &am33xx_pinmux {
    pinctrl-names = "default";
    pinctrl-0 = < &ws_gpio0_pins &ws_gpio1_pins &ws_gpio2_pins>;

    ws_gpio0_pins: pinmux_ws_gpio0_pins {
    pinctrl-single,pins = <

    ---------------------------------------------------------------

    ---------------------------------------------------------------

    >;
    };

  • 0 in reply to Kemal R. Shakir
    Prodigy 80 points
    Thanks a lot for the support.
  • 0 in reply to Kemal R. Shakir
    Prodigy 200 points

    I used this method to set up pin directory. but, it does not work . I am not sure that the pin is not shared by others. do you know how to initialize the pin direction in tree file.

    thanks!