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AM335x ePWM waveform generation from U-boot

Other Parts Discussed in Thread: AM3352

Hi,

I'd like to generatea PWM waveform within UBoot. 

To do so, I:

1) Set my pin as output

2) I configure my pin in eCAP0_in_PWM0_out mode

3) I enable PWMSS block (CM_PER_EPWMSS0_CLKCTRL)

4) I enable ePWM0 tbclk (pwmss_ctrl)

5) Check if clock is enable

6) I configure the period (TBPRD)

7) I reset phase and counter register (TBPHS and TBCNT)

8) I configure control register (TBCTL = 0x30) 

9) I set CMPA to half TBPRD for 50% duty cycle

10) I set CMPCTL to 0x00

11) I set AQCTL to 0x21

Is there something more I should do in order to see my signal on my output pin?

While use as GPIO, I can toggle it without problem.

  • Hi Biser,

    I've checked your link but it didn't help. I'm doing the following things:

    #Enable PWMSS block
    md.l 0x44E000D4 1
    mw.l 0x44E000D4 0x2

    #Configure C18 as output (gpio0_7)
    md.l 0x44E07134 1
    mw.l 0x44E07134 0xfffeff7f

    #Configure C18 as eCAP0_in_PWM0_out (mode 0)
    md.l 0x44E10964 1
    mw.l 0x44E10964 0x28

    #Enable ePWM0 clk
    md.w 0x44E10664 1
    mw.w 0x44E10664 0x1

    #Check clock status
    md.w 0x4830000C 1

    #Change period BEB -> BEB/2 = 5F5 (32.728 kHz)
    md.w 0x4830020A 1
    mw.w 0x4830020A 0xBEB

    #Clear Phase and TB counter
    md.w 0x48300206 1
    mw.w 0x48300206 0x0
    md.w 0x48300208 1
    mw.w 0x48300208 0x0

    #Configure TBCTL
    md.w 0x48300200 1
    mw.w 0483000200 0x00

    #Configure CMPA (50% dc)
    md.w 0x48300212 1
    mw.w 0x48300212 0x5F5

    #Configure CMPCTL
    md.w 0x4830020E 1
    mw.w 0x4830020E 0x00

    #Configure AQCTLA
    md.w 0x48300216 1
    mw.w 0x48300216 0x00

  • What processor is this and what Linux version are you using?
  • AM3352 600 MHz
    Linux 4.1.13
    Uboot 2016.05
  • #ConfigureC18 as output (gpio0_7) <-- This is totally unnecessary.

    See section 15.3.3.5 from the AM335x TRM Rev. O for correct eCAP initialization sequence.
  • #Enable block
    md.l 0x44E000D4 1
    mw.l 0x44E000D4 0x2


    #Configure C18 as eCAP0_in_PWM0_out
    md.l 0x44E10964 1
    mw.l 0x44E10964 0x00

    #Enable ePWM0 clk
    md.w 0x44E10664 1
    mw.w 0x44E10664 0x1

    #Check clock status (Is PWMSS_CLKCONFIG_REG = 0x101?)
    md.w 0x4830000C 1

    #Configure ECCTL2
    md.w 0x4830012A 1
    mw.w 0x4830012A 0x0280

    #Writing CAP1-3
    mw.l 0x48300108 0xBEA
    mw.l 0x48300110 0xBEA

    #Writing CAP2-4
    mw.l 0x4830010C 0x5F5
    mw.l 0x48300114 0x5F5

    #Configure CTRPHS
    md.l 0x48300104 1
    mw.l 0x48300104 0x0

    #Setting ECCTRL to Run
    md.w 0x4830012A 1
    mw.w 048300012A 0x0290

    That worked. It is a bit unclear because of C18 that still has to be configured as eCAP0_in_PWM0_out instead of pr1_ecap0_ecap_capin_apwm_o. Although we are programming APWM.

    Is there a way that during boot this output is not reset?
  • Nicolas Gugger said:
    It is a bit unclear because of C18 that still has to be configured as eCAP0_in_PWM0_out instead of pr1_ecap0_ecap_capin_apwm_o

    Of course it has to be eCAP0_in_PWM0_out. The other mode - pr1_ecap0_ecap_capin_apwm_o connects the eCAP unit that's inside PRU1.

    Nicolas Gugger said:
    Is there a way that during boot this output is not reset?

    I will ask the software team to comment. They will post here.

  • Thank you,

    Best regards,

    Nicolas
  • Hi Nicolas,

    Is there a way that during boot this output is not reset?


    Have you tried adding these settings in the board/ti/am335x/board.c file? This is the u-boot initialization file and doing the __raw_writel() to the appropriate registers should enable the PWM upon every device boot-up. So you will have this enabled immediately when u-boot loads (after powering up your board).

    Best Regards,
    Yordan