Other Parts Discussed in Thread: SYSCONFIG
Hi,
In order to enable PWM, I added several read / write instructions to the PWM registers in u-boot. But I have data abort when I run the following code:
#include <common.h>
#include <asm/io.h>
#define PWMSS2_BASE 0x48304000
#define PWMSS_EPWMCLK_EN BIT(8)
/* PWMSS (from arch/arm/include/asm/arch-am33xx/cpu.h) */
struct pwmss_regs {
unsigned int idver;
unsigned int sysconfig;
unsigned int clkconfig;
unsigned int clkstatus;
};
static int enable_pwm(void)
{
u16 val;
struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS2_BASE;
puts("pwm: read ...\n");
val = readw(&pwmss->clkconfig);
puts("pwm: write ...\n");
writew(val | PWMSS_EPWMCLK_EN , &pwmss->clkconfig);
/* --- Some other stuff --- */
}
Output:
U-Boot SPL 2013.10-g91321e5-dirty (Apr 21 2017 - 13:55:44)
U-Boot 2013.10-g91321e5-dirty (Apr 21 2017 - 13:55:44)
I2C: ready
DRAM: 512 MiB
NAND: 512 MiB
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Using default environment
pwm: read ...
data abort
MAYBE you should read doc/README.arm-unaligned-accesses
pc : [<9ff81390>] lr : [<9ff813fc>]
sp : 9fb60f00 ip : 9ffb85b4 fp : 80810fa4
r10: 8082dadb r9 : 9fb60f38 r8 : 4030cdcc
r7 : 4030cb7c r6 : 00000002 r5 : 00028bac r4 : 48304000
r3 : 9ffa094c r2 : 00000001 r1 : 00000100 r0 : 48304000
Flags: nZCv IRQs off FIQs on Mode SVC_32
Resetting CPU ...
At the same time I tried to access registers I2c and no errors appeared after running this code:static int i2c_test_read(void)
{
struct i2c *i2c_base = (struct i2c *)I2C_DEFAULT_BASE;
readw(&i2c_base->stat);
puts("i2c read OK \n");
}
Please let me know what i'm doing wrong
