Linux/am3352: GPMC 8-bit non-muliplex mode

LIANG WANG102707

Part Number: AM3352

Tool/software: Linux

Hi Biser:

I am using the old version kernel with following config

static struct pinmux_config gpmc_dr_pin_mux[] = {
{"gpmc_ad0.gpmc_ad0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad1.gpmc_ad1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad2.gpmc_ad2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad3.gpmc_ad3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad4.gpmc_ad4", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
{"mmc0_dat1.gpmc_a22", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"mmc0_dat0.gpmc_a23", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"mmc0_clk.gpmc_a24", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
{"gpmc_csn0.gpmc_csn0", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{"gpmc_ben0_cle.gpmc_ben0_cle", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{"gpmc_ben1.gpmc_ben1",OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{"gpmc_oen_ren.gpmc_oen_ren", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
{"gpmc_wen.gpmc_wen", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

{NULL, 0},
};

Then I can see the config7 register of gpmcs0 is 0x42 which will allocate the hardware address 0x2000000 .

then the config1 is 0 .

when I use the address to write data in kernel mode or user mode like the following method ,

I do see the data line gpmc_ad0 to gpmc_ad7 roll.

for(j = 0; j < 0xF0000000; j++) {
for (i = 0; i < 0x5; i++) {
reg_addr=p+ (i << 22);
if(i%2)
iowrite8(0x5c,reg_addr);
else iowrite8(0xa3,reg_addr);

mdelay(1)
}

But I do not see the address line A22 A23 A24 roll canyou help me to fix?

Best regards

wangl

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Hi,

What is your kernel version? First of all you have to check that your pinmux settings for A22, A23, and A24 are not getting overwritten by other pinmux settings.

0 LIANG WANG102707 over 8 years ago in reply to Biser Gatchev-XID

Expert 1415 points

I have checked that it not overwriten by other pinmux.My kernel version is old one linux 3.2.0

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

LIANG WANG102707 said:
for(j = 0; j < 0xF0000000; j++) {
for (i = 0; i < 0x5; i++) {
reg_addr=p+ (i << 22);
if(i%2)
iowrite8(0x5c,reg_addr);
else iowrite8(0xa3,reg_addr);

mdelay(1)
}

I see only one closing bracket " } " here. Shouldn't here be two?

0 LIANG WANG102707 over 8 years ago in reply to Biser Gatchev-XID

Expert 1415 points

That is not the problem,because I only copy part of the code .The compiler will output error for these type fault.
The problem is why the address line do not work.

0 Biser Gatchev-XID over 8 years ago in reply to LIANG WANG102707

TI__Guru**** 393215 points

Please dump the pinmux register values for these pins and double-check. Also check that LIMITEDADDRESS=0 in GPMC_CONFIG register.

0 LIANG WANG102707 over 8 years ago in reply to Biser Gatchev-XID

Expert 1415 points

Hi Biser:
what does this bit mean?The GPMC_CONFIG is 0x12 so that bit is set .

0 Biser Gatchev-XID over 8 years ago in reply to LIANG WANG102707

TI__Guru**** 393215 points

Limited Address device support:
0h = No effect. GPMC controls all addresses.
1h = A26-A11 are not modified during an external memory access.

You must set this bit to 0h.

0 LIANG WANG102707 over 8 years ago in reply to LIANG WANG102707

Expert 1415 points

Hi Biser:
I am using an old TRM version is F, there is no this bit description.After clear this bit ,it behave normal now.

0 Biser Gatchev-XID over 8 years ago in reply to LIANG WANG102707

TI__Guru**** 393215 points

Glad it's working, but you should update your TRM regularly. You can set an alert on the product page to notify you of updates.

0 LIANG WANG102707 over 8 years ago in reply to Biser Gatchev-XID

Expert 1415 points

Hi Biser：

I also found an problem.Why the be0 is alway low level.

I think it would be low only when the CS turn to low level

When I use 16bit before ,it alway low when CS is low..

0 Biser Gatchev-XID over 8 years ago in reply to LIANG WANG102707

TI__Guru**** 393215 points

BE0 state is not defined outside of the CS valid region. On an 8-bit device this signal is irrelevant.

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Linux/am3352: GPMC 8-bit non-muliplex mode