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RTOS/AM4379: UART parity configuration

Part Number: AM4379

Tool/software: TI-RTOS

Dear All,

I'm working with Processor SDK RTOS for AM437x 3.2.0 and I've initialized UART1 as follows:

    UART_Param.baudRate = 38400;
    UART_Param.parityType = UART_PAR_EVEN;
    UART_Param.writeDataMode = UART_DATA_BINARY;
    UART_Param.readDataMode = UART_DATA_BINARY;
    UART_Param.readReturnMode = UART_RETURN_FULL;
    UART_Param.readEcho = UART_ECHO_OFF;
    UART = UART_open(1, &UART_Param);

However, by looking at UART frames via oscilloscope, I see framing errors and, in fact, LCR value is 0x0003. If I change it to 0x001B by writing directly to that register after calling UART_Open() the frame is correct.

What am I missing?

  • The RTOS team have been notified. They will respond here.
  • Hi,

    Do you use any TI AM437x EVM or this is your own board? The UART_param is a structure with:

    const UART_Params user_params = {
    UART_MODE_BLOCKING, /* readMode */
    UART_MODE_BLOCKING, /* writeMode */
    0U, /* readTimeout */
    0U, /* writeTimeout */
    NULL, /* readCallback */
    NULL, /* writeCallback */
    UART_RETURN_NEWLINE, /* readReturnMode */
    UART_DATA_TEXT, /* readDataMode */
    UART_DATA_TEXT, /* writeDataMode */
    UART_ECHO_ON, /* readEcho */
    115200, /* baudRate */
    UART_LEN_8, /* dataLength */
    UART_STOP_ONE, /* stopBits */
    UART_PAR_NONE /* parityType */
    };

    How do you fill in the other parameters? From the difference of LCR register: 0x3 vs 0x1B
    Bit 3: PARITY_EN
    Bit 4: PARITY_TYPE1

    This is configured via UARTLineCharacConfig(). Are you able to try the latest P-SDK RTOS 4.0 for AM437x to see if it works for you.

    Regards, Eric
  • lding said:
    Hi,

    Do you use any TI AM437x EVM or this is your own board?

    I'm using AM437x IDK

    lding said:

    The UART_param is a structure with:

    const UART_Params user_params = {
    UART_MODE_BLOCKING, /* readMode */
    UART_MODE_BLOCKING, /* writeMode */
    0U, /* readTimeout */
    0U, /* writeTimeout */
    NULL, /* readCallback */
    NULL, /* writeCallback */
    UART_RETURN_NEWLINE, /* readReturnMode */
    UART_DATA_TEXT, /* readDataMode */
    UART_DATA_TEXT, /* writeDataMode */
    UART_ECHO_ON, /* readEcho */
    115200, /* baudRate */
    UART_LEN_8, /* dataLength */
    UART_STOP_ONE, /* stopBits */
    UART_PAR_NONE /* parityType */
    };

    How do you fill in the other parameters?

    Sorry, I forgot to say that I just call:

    UART_Params_init(&UART_Param);

    before the code I put in my first message.

    lding said:

    From the difference of LCR register: 0x3 vs 0x1B
    Bit 3: PARITY_EN
    Bit 4: PARITY_TYPE1

    This is configured via UARTLineCharacConfig(). Are you able to try the latest P-SDK RTOS 4.0 for AM437x to see if it works for you.

    Regards, Eric

    I'll check the latest RTOS soon, but my project is based on EtherCAT slave and I'm wondering if RTOS 4.0 already support it. Can you please confirm this?

  • Hi,

    Please check processors.wiki.ti.com/.../PRU_ICSS_EtherCAT. Ethercat is in a separate package. This release requires Processor SDK RTOS,

    Regards, Eric
  • lding said:
    Hi,

    This is configured via UARTLineCharacConfig(). Are you able to try the latest P-SDK RTOS 4.0 for AM437x to see if it works for you.

    UARTLineCharacConfig() set LCR as

    /* Programming the PARITY_EN, PARITY_TYPE1 and PARITY_TYPE2 fields in LCR.*/
    lcrRegValue |= parityFlag & (UART_LCR_PARITY_TYPE2_MASK |
    UART_LCR_PARITY_TYPE1_MASK |
    UART_LCR_PARITY_EN_MASK);

    this function is called from UART driver as:

    UARTLineCharacConfig(hwAttrs->baseAddr,
    (object->params.dataLength | object->params.stopBits),
    object->params.parityType);

    parityType (which is parityFlag argument of UARTLineCharacConfig() is enumerated as:

    typedef enum UART_PAR_e {
    UART_PAR_NONE = 0, /*!< No parity */
    UART_PAR_EVEN = 1, /*!< Parity bit is even */
    UART_PAR_ODD = 2, /*!< Parity bit is odd */
    UART_PAR_ZERO = 3, /*!< Parity bit is always zero */
    UART_PAR_ONE = 4 /*!< Parity bit is always one */
    } UART_PAR;

    So when I configure UART_PAR_EVEN it just enable bit 1, which is totally wrong

    Am I missing something or is there a huge bug in UART driver about parity configuration?

    (please note that the code is nearly the same in both pdk_am437x_1_0_5 (which I'm currently using) and latest pdk_am437x_1_0_7)

  • Hi,

    I traced the code in PDK 1.0.5 and 1.0.7. Yes, this is a bug. I believe it just fixed in Processor SDK RTOS 4.1 (AM437 1.0.8), which will come out in a week or so. Thanks for pointing this out and patience!

    There is some code to convert the parityType from enumeration into a bit location.

              /* Configuring UART line characteristics */

               parityType = UART_getParityType(object->params.parityType);

               UARTLineCharacConfig(hwAttrs->baseAddr,

                                    (object->params.dataLength | object->params.stopBits),

                                    parityType);

    Regards, Eric

  • Dear Eric,

    thank for you confirm.

    lding said:

    There is some code to convert the parityType from enumeration into a bit location.

              /* Configuring UART line characteristics */

               parityType = UART_getParityType(object->params.parityType);

               UARTLineCharacConfig(hwAttrs->baseAddr,

                                    (object->params.dataLength | object->params.stopBits),

                                    parityType);

    to hotfix current PDK and without reinventing the wheel, can you please share that UART_getParityType() function? or can I access some kind of beta release of the newer PDK so I can take tha patch on my own?

    Kind Regards and TIA,

    Andrea

  • Hi,

    The Processor SDK RTOS 4.1 has released with the fix: software-dl.ti.com/.../index_FDS.html

    Regards, Eric
  • lding said:
    Hi,

    The Processor SDK RTOS 4.1 has released with the fix: software-dl.ti.com/.../index_FDS.html

    Perfect!

    I backport the patch to pdk_am437x_1_0_5 and parity is configured corretly now

    Thanks for your support

    Andrea