AM5746: Timer usage in RTOS

Hi,

Q1.
You can look this page for information: software-dl.ti.com/.../TimerSupport.html

What the default partition of timers is for each core and how to override the availmask, also code examples how to setup a timer.

Q2. From AM572x TRM:
22.2.1 General-Purpose Timers Overview
The device has 16 GP timers: TIMER1 through TIMER16.
• TIMER1(1ms tick): has its event capture pin tied to 32KHz clock and can be used to gauge the system
clock input and detects its frequency among 19.2, 20, or 27 MHz. It includes specific functions to
generate accurate tick interrupts to the operating system
• TIMER2 and TIMER10: (1ms tick timers): they include specific functions to generate accurate tick
interrupts to the operating system
Each timer (except TIMER12) can be clocked from the system clock (19.2, 20, or 27 MHz) or the 32-kHz
clock. The selection of clock source is made at the power, reset, and clock management (PRCM) module
level. TIMER12 can be clocked only from the internal oscillator (on-die oscillator

You can't use a input clock of 1MHz to the timer.

By default that the Sysbios assumes 19.2MHz for timer input. The actual one may be different. For the TI EVM the input is 20MHz, you need to change that, see:

e2e.ti.com/.../515403
e2e.ti.com/.../680756
processors.wiki.ti.com/.../Processor_SDK_RTOS:_TI_RTOS_Tips_And_Tricks

Regards, Eric

Hi Kaka,

A1-1: Yes, you need to look at DRA7xx for AM572X. Note, please look at the entry under ti.catalog.arm.cortexa15 for your A15, do not use the one for C6000, M4, etc.

A1-2: Yes, savailMask = 0xFFFF;

A1-3: for this you need to look at multiple sources and put them together:

Doc 1. software-dl.ti.com/.../TimerTables.html

Timer ID Timer Name Timer Base Address Timer Interrupt Number Timer Event Id Timer Frequency (in Hz)
0 GPTimer1 0x4ae18000 69 Not used 19200000
1 GPTimer2 0x48032000 70 Not used 19200000
2 GPTimer3 0x48034000 71 Not used 19200000
3 GPTimer4 0x48036000 72 Not used 19200000
4 GPTimer5 0x48820000 73 Not used 19200000
5 GPTimer6 0x48822000 74 Not used 19200000
6 GPTimer7 0x48824000 75 Not used 19200000
7 GPTimer8 0x48826000 76 Not used 19200000
8 GPTimer9 0x4803e000 77 Not used 19200000
9 GPTimer10 0x48086000 78 Not used 19200000
10 GPTimer11 0x48088000 79 Not used 19200000
11 GPTimer12 0x4ae20000 127 Not used 19200000
12 GPTimer13 0x48828000 -1 Not used 19200000
13 GPTimer14 0x4882a000 -1 Not used 19200000
14 GPTimer15 0x4882c000 -1 Not used 19200000
15 GPTimer16 0x4882e000 -1 Not used 19200000

This showed that interrupt number (intNum) is 69, 70, 71 ....

Doc 2. Look at AM572x TRM Table 17-2. MPU_INTC Default Interrupt Mapping

MPU_IRQ_37 (ID69) 32 CTRL_CORE_MPU_IRQ_36_37[24:16] 32 TIMER1_IRQ TIMER1 interrupt
MPU_IRQ_38 (ID70) 33 CTRL_CORE_MPU_IRQ_38_39[8:0] 33 TIMER2_IRQ TIMER2 interrupt
MPU_IRQ_39 (ID71) 34 CTRL_CORE_MPU_IRQ_38_39[24:16] 34 TIMER3_IRQ TIMER3 interrupt
MPU_IRQ_40 (ID72) 35 CTRL_CORE_MPU_IRQ_40_41[8:0] 35 TIMER4_IRQ TIMER4 interrupt
MPU_IRQ_41 (ID73) 36 CTRL_CORE_MPU_IRQ_40_41[24:16] 36 TIMER5_IRQ TIMER5 interrupt
MPU_IRQ_42 (ID74) 37 CTRL_CORE_MPU_IRQ_42_43[8:0] 37 TIMER6_IRQ TIMER6 interrupt
MPU_IRQ_43 (ID75) 38 CTRL_CORE_MPU_IRQ_42_43[24:16] 38 TIMER7_IRQ TIMER7 interrupt
MPU_IRQ_44 (ID76) 39 CTRL_CORE_MPU_IRQ_44_45[8:0] 39 TIMER8_IRQ TIMER8 interrupt
MPU_IRQ_45 (ID77) 40 CTRL_CORE_MPU_IRQ_44_45[24:16] 40 TIMER9_IRQ TIMER9 interrupt
MPU_IRQ_46 (ID78) 41 CTRL_CORE_MPU_IRQ_46_47[8:0] 41 TIMER10_IRQ TIMER10 interrupt
MPU_IRQ_47 (ID79) 42 CTRL_CORE_MPU_IRQ_46_47[24:16] 42 TIMER11_IRQ TIMER11 interrupt

You can see the ID69, ID70 .... matched above intNum

Doc 3: Look at AM572x TRM Table 22-4. GP Timers Hardware Requests

Instance
Source Signal
Name
Destination
IRQ_CROSSBAR
Input
Default Mapping Description
TIMER1 TIMER1_IRQ IRQ_CROSSBAR_32 MPU_IRQ_37 TIMER1 interrupt
DSP1_IRQ_63
DSP2_IRQ_63
TIMER2 TIMER2_IRQ IRQ_CROSSBAR_33 MPU_IRQ_38 TIMER2 interrupt
DSP1_IRQ_64
DSP2_IRQ_64
TIMER3 TIMER3_IRQ IRQ_CROSSBAR_34 MPU_IRQ_39 TIMER3 interrupt
DSP1_IRQ_65
DSP2_IRQ_65
IPU1_IRQ_53
IPU2_IRQ_53
TIMER4 TIMER4_IRQ IRQ_CROSSBAR_35 MPU_IRQ_40 TIMER4 interrupt
DSP1_IRQ_66
DSP2_IRQ_66

SPRUHZ6I–October 2014–Revised April 2017 5587
Submit Documentation Feedback
Copyright © 2014–2017, Texas Instruments Incorporated
Timers
Table 22-4. GP Timers Hardware Requests (continued)
IPU1_IRQ_54
IPU2_IRQ_54
TIMER5 TIMER5_IRQ IRQ_CROSSBAR_36 MPU_IRQ_41 TIMER5 interrupt
DSP1_IRQ_67
DSP2_IRQ_67
TIMER6 TIMER6_IRQ IRQ_CROSSBAR_37 MPU_IRQ_42 TIMER6 interrupt
DSP1_IRQ_68
DSP2_IRQ_68
TIMER7 TIMER7_IRQ IRQ_CROSSBAR_38 MPU_IRQ_43 TIMER7 interrupt
DSP1_IRQ_69
DSP2_IRQ_69
TIMER8 TIMER8_IRQ IRQ_CROSSBAR_39 MPU_IRQ_44 TIMER8 interrupt
DSP1_IRQ_70
DSP2_IRQ_70
TIMER9 TIMER9_IRQ IRQ_CROSSBAR_40 MPU_IRQ_45 TIMER9 interrupt
DSP1_IRQ_71
DSP2_IRQ_71
IPU1_IRQ_55
IPU2_IRQ_55
TIMER10 TIMER10_IRQ IRQ_CROSSBAR_41 MPU_IRQ_46 TIMER10 interrupt
DSP1_IRQ_72
DSP2_IRQ_72
TIMER11 TIMER11_IRQ IRQ_CROSSBAR_42 MPU_IRQ_47 TIMER11 interrupt
DSP1_IRQ_73
DSP2_IRQ_73
IPU1_IRQ_56
IPU2_IRQ_56
TIMER12 TIMER12_IRQ IRQ_CROSSBAR_90 MPU_IRQ_95 TIMER12 interrupt

TIMER13 TIMER13_IRQ IRQ_CROSSBAR_339 - TIMER13 interrupt. This IRQ source signal is
not mapped by default to any device INTC
TIMER14 TIMER14_IRQ IRQ_CROSSBAR_340 - TIMER14 interrupt. This IRQ source signal is
not mapped by default to any device INTC
TIMER15 TIMER15_IRQ IRQ_CROSSBAR_341 - TIMER15 interrupt. This IRQ source signal is
not mapped by default to any device INTC
TIMER16 TIMER16_IRQ IRQ_CROSSBAR_342 - TIMER16 interrupt. This IRQ source signal is

You can see here TRIMER13, 14, 15, 16 you need to setup crossbar.

Doc 4:
software-dl.ti.com/.../TimerSupport.html

var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer');
var IntXbar = xdc.useModule('ti.sysbios.family.shared.vayu.IntXbar');
var TimerSupport = xdc.useModule('ti.sysbios.family.shared.vayu.TimerSupport');

// The new availability mask includes GP Timers 13, 14, 15 & 16.
// The interrupt sources for these timers is not connected to the
// DSP and need to be connected by the user.
TimerSupport.availMask = 0xF000;

// Connect GP Timer 13 to EventId 76 (XBAR Instance 45)
IntXbar.connectMeta(45, 339);

// Connect GP Timer 14 to EventId 77 (XBAR Instance 46)
IntXbar.connectMeta(46, 340);

// Connect GP Timer 15 to EventId 78 (XBAR Instance 47)
IntXbar.connectMeta(47, 341);

// Connect GP Timer 16 to EventId 81 (XBAR Instance 49)
IntXbar.connectMeta(49, 342);

// The DMTimer's timer mapping table shows that the intNum
// for GP Timer 13, 14, 15 & 16 is -1 implying the intNum
// has not been assigned by default. The below code utilizes
// the DMTimer module's timerSettings array to assign
// a default intNum to each of these timers.
Timer.timerSettings[12].intNum = 14;
Timer.timerSettings[13].intNum = 15;
Timer.timerSettings[14].intNum = 4;
Timer.timerSettings[15].intNum = 5;

To me:

1. 339, 340, 341, 342 looks right.
2. 45, 46, 47, 49, From Doc 2. 45, 46, 47 is reserved. 49 is for STAT_IRQ. If you don't use this. It should be OK.
3. intNum, 14, 15, 4, 5 seems for C6000. Same from Doc 2, if you use crossbar 45, you can use ID 82.

I tested below:
TimerSupport.availMask = 0xFFFF;

// Connect GP Timer 13 to EventId 76 (XBAR Instance 45)
IntXbar.connectMeta(45, 339);
Timer.timerSettings[12].intNum=82;

var timer0Params = new Timer.Params();
timer0Params.instance.name = "timerTest";
timer0Params.period = 100000;
timer0Params.extFreq.lo = 20000000;
timer0Params.periodType = xdc.module("ti.sysbios.interfaces.ITimer").PeriodType_MICROSECS;

Program.global.timerOwn = Timer.create(12, "&TimerFunction", timer0Params); // ok

It worked for me. You may use this as a reference for further testing.

Q2-1 and Q2-2: I don't know the purpose of ext and int. I searched the SYSBIOS source code:

in ti\sysbios\timers\dmtimer\timer.c

Void Timer_getFreq(Timer_Object *obj, Types_FreqHz *freq)
{
if (obj->extFreq.lo != NULL) {
*freq = obj->extFreq;
}
else {
*freq = Timer_module->intFreqs[obj->id];
}
}

If you don't have extFreq setup, then they take the intFreqs. So, you setup either of them (intFreqs or extFreq) according to the correct clock frequency to your board, it should work.

Regards, Eric