• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 30 subscribers
  • Views 327 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TLV320AIC3120: Bit clock vs Class-D frequency

TLV320AIC3120: Class-D output power

Boyan Petrov
Prodigy 50 points
Part Number: TLV320AIC3120

Hello,

According to the datasheet, the output voltage of the class-D amplifier is (maximum?) 2.2V RMS.

This gives 0.61W average power on 8 Ohm speaker and 1.21W average power on 4 Ohm speaker. In the datasheet the stated power is the peak one, ie twice less than the average.

Also 2.2V RMS  gives 3.11V peak. So, I presume, the output voltage cannot go bigger than the AVDD.

My question:

Why and what is the benefit of powering the Class-D amplifier with 5V? The output voltage cannot go more than AVDD (3.6V max) anyway.

Thank you.

  • 0
    TI__Mastermind 23030 points

    Th SPKVDD>=AVDD. This mans that for an AVDD of 3.6v the SPKVDD>3.6V.

    The Supply for the Class D is SPKVDD

    Estimation of Maximum Power at SPKVDD=5.5V and RL=4ohm

    The Datasheet States PO=2.5W at RL=4 ohm.

    Po=Vrms^2/R

    2.5=Vrms^2/4

    Vrms=3.2v across 4 ohm speaker.

    This mans a Vp=Vrms*sqrt(2)

    Vp=4.5v. 

    The Theoretical SPKVDD is 4,5v. However in practice there are voltage losses due to rhe RDson of the MOSFETs in the Bridge

    T

  • 0 in reply to Sanjay Dixit
    Prodigy 50 points

    Thanks Sanjay, this is the exact problem: the speaker voltage can not go more than 2.3V RMS (or 3.2Vpk) no matter what is the SPKVDD or the RL. The pulses of the Class-D are with the  amplitude of the SPKVDD (5VDC), but the actual audio output is maximum 3.2Vpk. It seems the limit occurs before the Class-D. 

    Ok, the SPKVDD must be bigger than AVDD because the PWM can not go from 0 to 100%. The switching time of the MOSFETs will be too small around 1% and 99% and the losses too big. Again: no matter what is the SPKVDD, the actual (peak) audio output is limited to AVDD. And this is not stated in the datasheet.