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PCM1690: Driving BCK - I2S Master Mode?

Jeroen van Waterschoot
Prodigy 20 points
Part Number: PCM1690
Other Parts Discussed in Thread: TLV320ADC5140

We have a design with PCM1690 where it is controlled by a software coded I2C bus, and is used in I2S slave mode. There is a lot of communication on the I2C bus, polling every couple of milliseconds etc, to other devices on the bus. The PCM is only initialized once after reset. After some minutes, the PCM1690 starts acting like a I2S master, and outputting a bit clock and word clock. This of course upsets the bus with audio problems as a result. How can this happen? According to the data sheet, the PCM does not have an I2S master mode. I suspect it is somehow falsely reading some other information from the bus, or maybe some other cause can set it to master mode? Or am I completely wrong and the IC doesn't even have a driver on that pin? I have added some 47R resistors in series with BCK and WCK and can measure that there is a significant voltage across those resistors (around 0.5V, indicating a drive current of around 10mA). Please let me know if the PCM could indeed enter I2S master mode, and how, so that I can pinpoint the root cause. Thank you!

  • 0
    TI__Mastermind 31741 points

    Hello Jeroen,

    Sorry for delay. We will  into this and will come back to you with an answer.

    Regards,

    Arash

  • 0 in reply to Arash Loloee
    TI__Guru 55043 points

    Hi Jeroen,

    That is weird behavior! Can you confirm that if you disconnect the PCM1690 from the I2C bus that it never enters this mode? Can you confirm that there are no shared device addresses on the I2C bus? Even if the register addresses are different, it is bad practice to have multiple devices share a device address.

    Thanks,

    Paul

  • 0 in reply to Paul_Frost
    Prodigy 20 points

    Hi Paul,

    I have done a test some time ago where I did not disconnect the pins but stopped the communication on the I2C bus, and the problem did not occur. I am on holiday now until end of July, then I can repeat the test.

    As for slave addresses: Of course we do not have multiple devices with the same slave address on the bus. Not even close, always at least 2 bits difference. It is only 3 devices total anyway: the PCM1690 (0x9e), a TLV320ADC5140 (0x98), and a EFM processor with two I2C addresses 0x68 and 0x6a. The PCM and the TLV are only written once at startup, which is OK. Then, the EFM is polled every 100ms or so.

    So, it is true that the PCM has a "hidden" master mode that can be activated somehow? Do you have any idea how the PCM could interpret I2C data as a start condition and start listening to data? That is the only explanation I can think of, that some random data is read as the PCM address, followed by more data that then sets some random registers in the PCM.

    Kind regards, Jeroen