TLV320AIC3100: Playback speed issue in TLV320AIC3100 Audio codec

Ravi V

Part Number: TLV320AIC3100

We have successfully configured the Audio codec as per the suggestion provided by TI and the link as given below

https://e2e.ti.com/support/audio/f/audio-forum/773056/faq-linux-drivers-device-drivers-for-aic31xx-dac31xx-aic325x-aic320x-aic326x-aic321x?tisearch=e2e-sitesearch&keymatch=CODEC%252525252520Linux%252525252520Driver

Currently we are facing other issues with respect to playback speed.

Problem statement : The playback speed in TLV320AIC31xx is at half the speed of what is expected. We expect it to happen in 1x speed but the playback speed happening in 0.5x.

i have changed the frequencies up to clock-frequency = <19200000> in the DTS file, but the problem is not yet solved. Only we are facing the issues in TLV320AIC31xx audio codec, also i have tried with wm9860, everything working good.

So, i need your support to resolve this playback setting issues in the TLV320AIC31xx at driver level.

Regards
Ravi V

over 4 years ago

0 Ravi V over 4 years ago in reply to Sanjay Dixit

Prodigy 10 points

Yes sanjay, i have played with "aplay -v LRMonoPhase4.wav".

but, Still the same speed issue.

Please find the log

root@b2qt-nitrogen8m:~# aplay -v LRMonoPhase4.wav
Playing WAVE 'LRMonoPhase4.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo
Plug PCM: Rate conversion PCM (44100, sformat=S16_LE)
Converter: linear-interpolation
Protocol version: 10002
Its setup is:
stream : PLAYBACK
access : RW_INTERLEAVED
format : S16_LE
subformat : STD
channels : 2
rate : 48000
exact rate : 48000 (48000/1)
msbits : 16
buffer_size : 5760
period_size : 1920
period_time : 40000
tstamp_mode : NONE
tstamp_type : MONOTONIC
period_step : 1
avail_min : 1920
period_event : 0
start_threshold : 5760
stop_threshold : 5760
silence_threshold: 0
silence_size : 0
boundary : 6485183463413514240
Slave: Direct Stream Mixing PCM
Its setup is:
stream : PLAYBACK
access : MMAP_INTERLEAVED
format : S16_LE
subformat : STD
channels : 2
rate : 44100
exact rate : 44100 (44100/1)
msbits : 16
buffer_size : 5292
period_size : 1764
period_time : 40000
tstamp_mode : NONE
tstamp_type : MONOTONIC
period_step : 1
avail_min : 1764
period_event : 0
start_threshold : 5292
stop_threshold : 5292
silence_threshold: 0
silence_size : 0
boundary : 5958262307011166208
Hardware PCM card 0 'TI-TLV320AIC31xx-Card' device 0 subdevice 0
Its setup is:
stream : PLAYBACK
access : MMAP_INTERLEAVED

Please tell me what is the next change i have to do.

Regards

Ravi V

0 Ravi V over 4 years ago in reply to Sanjay Dixit

Prodigy 10 points

HI Sanjay,

I have tried with aplay command also, but still am seeing the same issue,

Please find the log file for the same.

Regards

Ravi V

0 Ravi V over 4 years ago in reply to Sanjay Dixit

Prodigy 10 points

HI Sanjay,

I have tried, but still the same issue.

Regards

Ravi V

0 Sanjay Dixit over 4 years ago in reply to Sanjay Dixit

TI__Mastermind 23030 points

Can you Get a dump of the registers after init and after play command (i2cdump) . Then do a diff of the dump outputs to see if any registers changed. Obviously, a register is not being programmed properly. Basically, we need to find if a DTS entry or some other configuration is preventing the registers from properly being configured.

0 Ravi V over 4 years ago in reply to Sanjay Dixit

Prodigy 10 points

hi sanjay,

there are few change in registers 0x06, 0x07, 0x08, 0x12, 0x13, 0x1e registers.

before play command

root@b2qt-nitrogen8m:~# i2cdump -y -f 3 0x18
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 00 00 01 66 00 91 04 00 00 00 00 81 81 00 80 80 ..?f.??....??.??
10: 08 00 81 81 80 80 04 00 00 00 01 0c 00 00 81 00 ?.?????...??..?.
20: 00 00 00 00 80 10 00 00 00 00 00 00 00 00 00 00 ....??..........
30: 00 00 00 02 32 12 03 02 02 11 10 00 01 04 00 14 ...?2??????.??.?
40: 0c 00 00 00 6f 38 00 00 00 00 00 ee 10 d8 7e e3 ?...o8.....???~?
50: 00 00 80 00 00 00 00 00 7f 00 00 00 00 00 00 00 ..?.....?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 .....?..........
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

after play command

root@b2qt-nitrogen8m:~# i2cdump -y -f 3 0x18
No size specified (using byte-data access)
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 00 00 01 66 03 91 07 14 90 00 00 88 82 00 80 80 ..?f?????..??.??
10: 08 00 88 82 80 80 04 00 00 00 01 0c 00 00 88 00 ?.?????...??..?.
20: 00 00 00 00 80 98 10 00 00 00 00 00 00 00 00 00 ....???.........
30: 00 00 00 02 32 12 02 02 02 11 10 00 01 04 00 94 ...?2??????.??.?
40: 00 00 00 00 6f 38 00 00 00 00 00 ee 10 d8 7e e3 ....o8.....???~?
50: 00 00 80 00 00 00 00 00 7f 00 00 00 00 00 00 00 ..?.....?.......
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
70: 00 00 00 00 00 02 00 00 00 00 00 00 00 00 00 00 .....?..........

please suggest what arre the change i have to do.

Regards,

Ravi

0 Sanjay Dixit over 4 years ago in reply to Sanjay Dixit

TI__Mastermind 23030 points

I seem to recall you had sent me register dumps of after init and play command. But for some reason I don't see them on this thread.

i am sorry but can you please repost .

0 Ravi V over 4 years ago in reply to Sanjay Dixit

Prodigy 10 points

hi sanjay,

there are few change in registers 0x06, 0x07, 0x08, 0x12, 0x13, 0x1e registers.

before play command

after play command

please suggest what arre the change i have to do.

Regards,

Ravi

0 Ravi V over 4 years ago in reply to Ravi V

Prodigy 10 points

Hi Sanjay,

I hope you have received the dump msg.

Please provide me the suggestions to resolve the issue.

Regards

Ravi V

0 Ravi V over 3 years ago in reply to Ravi V

Prodigy 10 points

HI Sanjay,

Gentle remainder, can you give me solution.

Regards

Ravi V

0 Ravi V over 3 years ago in reply to Ravi V

Prodigy 10 points

hi sanjay,

Can you please reply.

Regards

Ravi V

0 Ravi V over 3 years ago in reply to Ravi V

Prodigy 10 points

Hi Sanjay,

i understand you are busy, could you please provide me the solution to solve the play back issue.

Regards

Ravi V

0 Sanjay Dixit over 3 years ago in reply to Ravi V

TI__Mastermind 23030 points

Hi Ravi,

I apologize for the delayed response.

I am trying to work out the timing for your chip. Do you happen to know the frequency of the MCLK Waveform applied to the chip. I remembered you had measured it before but i dont now see it in the thread

0 Sanjay Dixit over 3 years ago in reply to Sanjay Dixit

TI__Mastermind 23030 points

Can you also check if this clock changes after applying the aplay command

0 Ravi V over 3 years ago in reply to Sanjay Dixit

Prodigy 10 points

Hi Sanjay,

I have measured the Frequency of MCLK, it showing is Zero before & after aplay (aplay -v LRMonoPhase4.wav ) command.

Also, i have measured the following clk as well and the values are WCLK is 19.80KHz & BCLK is 633.3KHz. This was already captured and you aware of this.

So, please let me know what modification i have do it next.

Regards

Ravi V

0 Sanjay Dixit over 3 years ago

TI__Mastermind 23030 points

I have taken a look at both files for before and After command execution. I notice register 0x1B sets up the device to give WCLK and BCLK as an output. This is done in Master Mode. But to work Master Mode needs

an external clock input MCLK.

From your observations I see that there is no external MCLK coming in.

I feel there would be somewhere settings for the I2s connection from the audio source that need to be properly setup . To make 48K work any of the below clock values need to be made from the source.

For example 6.144 Mhz may be one option for MCLK..

Please look within your board for the pin here the MCLK originates. perhaps that will help you locate how to set it up in firmware

My experience is mainly on the Hardware side and I can help you with Hardware issues and Codec I2C settings. I am not a specialist in the Linux sphere .

0 Ravi V over 3 years ago in reply to Sanjay Dixit

Prodigy 10 points

Hi Sanjay,

If i want to give external clock to MCLK means what are the changes i have to do.

And How much frequency shall i give to MCLK for solving this issue.

Also, can you please check the schematic and let me know is any correction is there?

Please do the needful.

Regards

Ravi V

0 Sanjay Dixit over 3 years ago

TI__Mastermind 23030 points

You can set up device in slave Mode. Here we provide BCLK,LRCLK and Din from an I2S Source.

The source can be 48Khz,16 bit i2s audio. The Source shall give LRCLK of 48kHZ and BCK=48K*32=1.53MHZ.

This should be checked with a CRO.

You can load the below script on I2C. Device address is 0x30.

Sound should come on class D Output.

let me know if it works.

Fullscreen AUDIO_CODE.txt Download

#			--------------------------------------------------------------- page 0 is selected 
w 30 00 00
#			 s/w reset
> 01
#			 PLL_clkin = BCLK,codec_clkin = PLL_CLK
w 30 04 07
> 91
> 20
> 00
> 00
#			 mode is i2s,wordlength is 16
w 30 1b 00
#			 NDAC is powered up and set to 4
w 30 0b 82
#			 MDAC is powered up and set to 4
> 84
w 30 12 84
> 84
#			 DOSR = 128, DOSR(9:8) = 0
> 00
#			             DOSR(7:0) = 128
> 80
#			 DAC => volume control thru pin disable 
w 30 74 00
#			 DAC => drc disable, th and hy
w 30 44 00
#			 DAC => 0 db gain left
w 30 41 00
#			 DAC => 0 db gain right
> 00
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01
#			 De-pop, Power on = 800 ms, Step time = 4 ms
w 30 21 4e
#			 HPL and HPR powered up
w 30 1f c2
#			 LDAC routed to HPL, RDAC routed to HPR
w 30 23 44
#			 HPL unmute and gain 1db
w 30 28 0e
#			 HPR unmute and gain 1db
> 0e
#			 No attenuation on HP
w 30 24 00
w 30 25 00

#			 MIC BIAS = AVDD
w 30 2e 0b
#			 MICPGA P = MIC 10k
w 30 30 40
#			 MICPGA M - CM 10k
> 40
#			--------------------------------------------------------------- page 0 is selected
w 30 00 00
#			 select DAC DSP mode 11 & enable adaptive filter
w 30 3c 0b
w 30 00 08
w 30 01 04
w 30 00 00
#			 POWERUP DAC left and right channels (soft step disable)
w 30 3f d6
#			 UNMUTE DAC left and right channels
> 00
#			 POWERUP ADC channel
w 30 51 80
#			 UNMUTE ADC channel
> 00
#			--------------------------------------------------------------- page 1 is selected
w 30 00 01
#			 Unmute Class-D Left
w 30 2a 1c
#			 Unmute Class-D Right
w 30 2b 1c
#			 Power-up Class-D drivers
w 30 20 c6

0 Ravi V over 3 years ago in reply to Sanjay Dixit

Prodigy 10 points

Hi Sanjay,

I have some update for you: I am getting the audio .wav file some what better, but not accurate.

I have updated the values as per the PLL example what you have mentioned above and with 0x0b & 0x0c optimised value

From kernel level, i am able to set the 0x0b = 1and 0x0c = 8 registers value. Also, am getting the following freq during playing BCLK=1.28MHz, WCLK=40KHz, MCLk:NA
/* 44.1k rate */
{12000000, 44100, 7, 0560, 128, 1, 8, 128, 8, 2},
{12000000, 44100, 8, 0560, 128, 1, 8, 128, 6, 3},
{12500000, 44100, 7, 2253, 128, 8, 2, 128, 8, 2},
/* 48k rate */
{12000000, 48000, 8, 1680, 128, 1, 8, 128, 8, 2},
{12000000, 48000, 7, 1680, 96, 1, 8, 96, 5, 4},
{12500000, 48000, 7, 8643, 128, 8, 2, 128, 8, 2},

The problem is how to confirm that is this standard 1x Speed?

Note:

The above script we are able to execute via i2cset command and not from the script.

Please help me the settings to update in the tlv320aic31xx.c, it is possible to update.

Regards

Ravi V

0 Ravi V over 3 years ago in reply to Ravi V

Prodigy 10 points

Hi Sanjay,

Based on the above setting of 0x0b & 0x0c, still 0.10x speed differnce is observed. But, i am unable to fine tune 0.10x percentange and i have no idea whch register will arrest this issue.

Can you help me on this.

Regads

Ravi V

0 Sanjay Dixit over 3 years ago

TI__Mastermind 23030 points

The I2C Settings i have sent are to configure the device for Slave mod with 48Khz Input.

The LRCK and BCK are inputs to the codec chip and we can leave the settings in the chip as i have sent . The PLL should be correctly set up for 48Khz

This means that the audio source (The audio processsor that is taking a 48k file and making data) should be set up to make an LRCLK of 48K and a BCLK of 1.53 Mhz.

You will have to find the code which adjusts the LRCK and BCK frequency coming into the codec chip. Once this is set to 48Khz and 1.53Mhz the sound shall be fine.

0 Ravi V over 3 years ago in reply to Sanjay Dixit

Prodigy 10 points

I Have tried to set all the register via i2cset,

But, unfortunately, it is not playing anything.

Please find the i2cdump screen shot for the same ( It contains Page 0 & Page 1)

0 Sanjay Dixit over 3 years ago

TI__Mastermind 23030 points

There are 2 aspects to this.

1, Setting the registers in the coded with the I2C Codes i have sent.

2. Providing a correct incoming timing corresponding to 48K so that LRCLK=48K and BCLK=48K*32 are fed into the chip. You will need to find the settings in the source (Not the Codec) which can do this.

Audio

Audio forum

TLV320AIC3100: Playback speed issue in TLV320AIC3100 Audio codec