Analog Side tone for AIC33 and AIC3106

Thank you for the quick response.  I'm not sure what 'analog bypass' means.  Our requirements are:

The side tone is used in HandSet and HeadSet operation to create more comfort to the person using the phone. Side tone should have total group delay of 4ms or less and have <3% THD. According to IETS-300.245-2 Section 5.2.5.3, side tone THD for 3rd harmonic must be <10% for entire phone.

Due to low delay requirements the side tone within the Analog Codec must be implemented in analog domain. Digital side tone implementations result in longer delays that are even further extended by the digital filters that must be placed within the loop.

If any filters are used within the side tone loop, one must take their delay into account when checking the above requirement for the side tone delay. The side tone delay requirement is for the total delay between the microphone input and speaker output, not just the part of isolated side tone branch.

Side tone controls must provide ability to disable/enable side tone loop. The side tone analog gain must provide the -3dB to -27dB range in 3dB increments.

Does the AIC33 support this type of side tone?

Thank you again,

Gary

Yes. The AIC33 and AIC3106 will support this side tone spec using the bypass feature.

The analog bypass will allow you to route a side tone directly from the input to the output (Bypassing the ADC and the DAC). The volume that the side tone will be injected is register programmable and will meet your spec.

Look at the data sheet under "bypass"

Thank you again !!

We are building a microphone array of 8 WM61 mics.  For 3101 ADCs what is the best way to partition the mics between chips?  Does each mic need a separate mic-bias or can they share?    Can each ADC run concurrently?  They will be connected to a McASP.  Does TI have an eval board where this array could be prototyped?

Thank you in advance.

Gary

Hi Gary,

I am not sure what part you are referring to. The post mentions the AIC33 and AIC3106 and your question refers to the 3101 and we have an AIC3101 and an ADC3101 which are quite different.

Each mic should have its own mic bias if minimizing cross talk is important. I assume you want each mic to have its own ADC? Do the ADC's need to be synchronized? You can run multiple ADC's in TDM mode on a single McASP port. Look at TDM in the data sheet.

I changed gears on you.  Your responses were so quick that I did not want to risk going to another thread :)

We are now passed the AIC33, 3106 questions and on to a new set pf problems.

We need 8 mics for our system.  We have 2x ADC3101s on the board but that's only 2x2 channels of ADC.  It would be nice to have a more integrated solution with 8 true ADC channels and it'd be even better if there was an eval board we can connect to our McASP.

Thanks again !!

Gary

Hello,

We are interfacing a 3101 to this microphone (http://www.bksv.com/products/transducersconditioning/acoustictransducers/microphones/4958.aspx) which requires a signal conditioning circuit.  Do you have a recommendation on how that might be done?

Thank you in advance,

Gary

Hello again,

Can the 3101 EVM be stacked 4 high to get 8 ADCs/mic inputs?  What is the limitation on for example the BCLK loading of the stacking?

Thank you,

Gary