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TAS2563: TDM Bus Low V-Sense Amplitude

Part Number: TAS2563
Other Parts Discussed in Thread: TEST

Hi Ivan,

TAS2563 is applied in a stereo configuration per the reference design in Application Note slaa920.  V-Sense data is placed on the shared TDM bus SDOUT1 with the following settings:

Left Register 0x0b = 0x40
Right Register 0x0b = 0x44

Other relevant information:

  • SBCLK1 = SBCLK2 = 3.072 MHz
  • FSYNC = 48 kHz
  • There are 1 kΩ resistors in series with the VSNS_P and VSNS_N input pins.

The V-Sense data is present, however, its amplitude is very low.  How can the amplitude be increased to avoid quantization noise?

EDIT: Attempted to change IVMON_LEN[1:0] from the default 16-bit configuration but longer/shorter bit configurations just appended 0's or truncated to MSB.

  • The V-Sense data is about 33 dB lower than the I2S DIN level.

  • Hi Oren,

    The full-scale reference of V-sense is 14Vpk, is your data aligned with this reference?

    Best regards,
    -Ivan Salazar
    Applications Engineer

  • I played back a -3dBFS sine wave to get a better V-Sense signal.  The recorded signal is about -36 dBFS.  (I edited my previous comment accordingly.)

  • The amplifier output is a ~2.5 Vrms sine wave with a -3 dBFS playback source file so I think the answer to your question is that V-Sense is not aligned with the full-scale reference. 

  • Oren,

    Can you confirm one thing about your configuration?
    When you generate the configuration files from End System Integration, did you changed ASI settings for IV-sense? It is default Audio In & Audio Out.

    Perhaps you're actually reading out some other data instead.

    Best regards,
    -Ivan Salazar
    Applications Engineer

  • Ivan,

    It was indeed left at the default setting, however, I am overwriting registers TDM_CFG4 through TDM_CFG10 with the following settings:

    TDM_CFG4 0x0A: 0xF3 (both sides)           Sets TDM TX bus keeper, fill, offset and transmit edge.
    TDM_CFG5 0x0B: 0x40 (left), 0x44 (right)   Sets TDM TX V-Sense time slot and enable.
    TDM_CFG6 0x0C: 0x00 (both sides)           Sets TDM TX I-Sense time slot and enable.
    TDM_CFG7 0x0D: 0x00 (both sides)           Sets TDM TX VBAT time slot and enable.
    TDM_CFG8 0x0E: 0x00 (both sides)           Sets TDM TX temp time slot and enable.
    TDM_CFG9 0x0F: 0x00 (both sides)           Sets ICLA bus, TDM TX limiter gain reduction time slot and enable.
    TDM_CFG10 0x10: 0x00 (both sides)          Sets boost current limiter slot and enable.
     
    This is what I'm seeing with these settings.
    TDM with audio on left only:
    TDM with audio on right only:
    - Should IVMON_LEN[1:0] in "TDM Configuration 2" be changed from its default 16-bit setting to 24-bit?
    This is what we have for the other RX configuration registers:
    TDM_CFG0 0x06: 0x09 (both sides)      Sets TDM frame start, sample rate, auto rate detection, and whether rate is based on 44.1 or 48 kHz.
    TDM_CFG1 0x07: 0x02 (both sides)      Sets TDM RX justification, offset and capture edge.
    TDM_CFG2 0x08: 0x08 (both sides)      Sets TDM RX time slot select, word length and time slot length.
    TDM_CFG3 0x09: 0x10 (both sides)      Sets TDM RX left and right time slots.
    - What is the purpose of the RX_SLOT_R and RX_SLOT_L selections in TDM_CFG3 if they're already set with RX_SCFG[1:0] in TDM_CFG2?
  • What is the Page # / Register # for setting "ASI Channel Channel selection" to I-Sense and V-Sense?

  • Hi Oren,

    Let me add comments on each case below:

    • ASI Channel selection is not a straight forward register write, you have to set 4 different registers (do not set only the last one as it may not take effect on the configuration):
      • Book 0
      • Page 9
      • Register 0x2c to 0x2f
      • Set to 00 00 00 02 for I-sense and V-sense
      • Set to 00 00 00 01 for Audio Out and Audio In
      • Set to 00 00 00 00 for Temperature and Excursion
    • In addition to ASI Channel selection the slot arrangement of these two sets of data is configured by TDM_CFG5 and TDM_CFG6
      • IVMON_LEN is controlling the data length of whatever data is coming out of the ASI Channel selection, eg. it can be IV-sense or Audio Out/In both controlled by the same register, depending on ASI Channel selection.
      • RX_SCFG is selecting either channel or a mix of them (this is basically the digital mixer)
      • RX_SLO_R and RX_SLOT_L are used to change the slots where data is coming into the mixer. This is useful when using TDM scheme where there are more than 2 slots only.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      Thanks, we will try it.

      Can you please clarify the differences between

      "Audio In" (I2S DIN?)
      "Audio Out" (Post DSP, pre class-D?) and
      V-Sense (Post DSP, post class-D)

      Regards, O.R.

    • Hi Oren,

      You're correct on the assumptions of the different types of data.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      A previous recommendation was to use V-Sense for EC.  Is "Audio Out" a valid selection for this purpose?

      Thanks, O.R.

    • Hi Oren

      I think it will be valid, checking this now

    • Hi Ivan,

      Thanks for your support in this case. Maybe you know where I can find documentation for Page 9 registers? In datasheet there are only Page 0 ones

    • Hi Oren, Krzysztof,

      Audio Out is recommended for echo cancellation, as this is the digital signal going to the DAC just before Class-D amplification. Perhaps the previous mention of V-sense was for an older or some non-DSP device that does not feature Audio Out option.

      Other pages than 0 and 1 are mostly coefficients for DSP domain, these are several and may change from one firmware release to another.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Thanks Ivan,

      our current setup of P9 registers 2c-2f was in default config: 08 00 10 00
      1st I setup them to 00 00 00 02, result is still the same, signal shape OK, very low amplitude (test tones 1kHz left than right - visible ok), TDM5 CFG is set to see both amplifiers Vout:

      Testing other combinations meanwhile

    • How can I than setup Audio Out to be output on TDM registers? Does it replace VSens or I Sense than?

      I am trying now: Page 09 regs 2c-2f: 00 00 00 02, Output channel set on reg Page 0 0b to the proper channel. Results seems to be thesame - very low amplitude signal.

      Is I have two amps on TDM bus I can only select one output signal from them (using registers 0b-08/Page 0)

    • Hello,

      Sorry for delay, Ivan has been occupied by his other job functions, but he will respond by end of day

      Best Regards,

      Carson

      LPA Applications Engineer

    • HI Krzysztof,

      Yes, the data sets for SDOUT are replacing Vsense and Isense as mentioned here:

      ASI Channel selection is not a straight forward register write, you have to set 4 different registers (do not set only the last one as it may not take effect on the configuration):
      • Book 0
      • Page 9
      • Register 0x2c to 0x2f
      • Set to 00 00 00 02 for I-sense and V-sense
      • Set to 00 00 00 01 for Audio Out and Audio In
      • Set to 00 00 00 00 for Temperature and Excursion

      Perhaps you want to make sure the data from both devices is not colliding, how many channels you see at the output?
      If you can read registers 0x0b to 0x0e from each device that should give an idea of how the data is coming back from each one to SDOUT.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Thanks Ivan, I am now trying to readback registers to confirm

    • Hi Krzysztof,

      Thanks for the notice, I'll follow up later if you need any further support.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,
      Reading back regs from 0b-0e, on both devices:

      Left AMP: 44 00 04 05

      Right AMP: 40 00 04 05

      Seems ok, data visible as pictured above - VSense, very low amplitude

    • Hi Krzysztof,

      Thanks for the feedback. I agree the register settings are OK, you should be getting similar sets of data on first and second SDOUT slots, in 32-bit slot scheme.

      By very low amplitude do you mean the returned and calculated value is not matching the measured value from scope or similar tool?
      Is it possible to share a short recording of the data so we can take a look at it? Initially testing with no gain or EQs, or using ROM mode, should help to know if there is anything unexpected happening with IV-sense data.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan, we will check but a couple of questions:

      - I think that registers 0d and 0e (TX VBAT and TX Temp) should be 00, can you please confirm?  (Please refer to my previous post with the scope plots.)
      - Re: ASI Channel selection... Your recommendation was to use the settings for Audio Out and Audio In.  How are the settings for registers 0b through 0e affected?  Does Audio Out and Audio In data supersede V-Sense and I-Sense?

    • Hi Oren,

      • TX VBAT and TX Temp can remain 04 05 or 00 00, it should not matter as long as bit 6 from each of these register is still 0, this is disabling these data slots to come out from SDOUT.
      • Registers 0b and 0e are working the same way, the only change is the data they're controlling depending on ASI Channel selection. As you mentioned the selected data supersede V-sense and I-sense.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Tested device in ROM mode, all default values, just setup the transmit data to VOUT,

      -our test tone we use for reference signal (1KHz sinwave, 28 bit resolution) 

      -test signal is audibly louder (no equlizer),

      -recorded signal amplitude is louder but knowing gain of the equalizer it seems only proportionally louder

    • Tested more on ROM mode, with just TDM config set to ger tight data on right place. Seems to be fine now. So it means that source of our problem must be somwhere in configuration used. We have tested two configuration: TI provided baseline and our accoustics team provided

      Below picture shows two channel recorded by device speakers (1st and 2nd and two VSense) signals are on roughtly same amplitude. AMP is running in ROM mode here (all registers except TDM cfg on default values)

    • Hi Krzysztof,

      In order to test something similar in tuning mode, I would suggest to start from a new (default) tuning, and double check the TDM settings are the same. Then also check ASI Chanel selection. You can use End System Integration to generate cfg files you can load through I2C directly as well.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      Is there a way to configure PPC3 to observe the "ASI Channel selection" TDM data on the EVB?  I scoped out FSYNC, I2S DIN, and TDM (SDOUT1) and found that it's possible to select V-Sense only in ROM Mode (in "Device Control") but that the V-Sense option changes to "Excursion Time" in Tuning Mode and the TDM data waveform changes after pressing "Apply".  I also noticed that the EVB apparently doesn't allow for a 64x BCLK/FSYNC ratio, as BCLK always stays at 12.288 MHz.  Please refer to the following screen shots for details.

      How should the TDM receiver and transmitter be configured with a 3.072 MHz BCLK?  (Same as shown?  How is ASI Audio Out mapped?)
      I would like to be able to observe the waveforms on the EVB with the same configuration as the end system, is it possible?

      Thanks, O.R.

      SDOUT1 V-Sense on Slot 0 and Slot 4 (8-bit TDM Slots, 12.288 MHz BCLK):

      PPC3 ROM Mode TDM Transmitter Channel 1:
      (As seen in scope plot.)

      PPC3 ROM Mode TDM Transmitter Channel 2:
      (As seen in scope plot.)

      PPC3 Tuning Mode TDM Transmitter Channel 1:
      (Channel 2 is similar.)

      PPC3 ROM Mode TDM Receiver Channel 1:
      (Channel 2 is the same as Channel 1; same in Tuning Mode)

    • Hi Oren,

      Default values from PPC3 are to send Excursion and Temperature, I'll send a PPC3 file with these settings changed (these are part of the hidden settings, sorry for the inconvenience).

      The USB to I2S controller on the board cannot be modified in terms of clock and sampling scheme, but you can interface the device with an external controller, the EVM can still be controlled through I2C from PPC3 and use "cfg" scripts to run in the I2C monitor, this should be similar to using h or bin files on the end system.

      This app note has some details on that process, but if not clear I can provide a step by step guide using an example: https://www.ti.com/lit/an/slaa954/slaa954.pdf

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Thanks Ivan, please send by e-mail via our local TI FAE.

    • Hi Oren,

      I will send some updates/requests by tomorrow through TI FAE, sorry for the delayed response.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan, I received the files from the TI FAE, thank you.

    • Hi Oren,

      Thanks for the feedback, let me know if you need further assistance either here on the forum or trough or local support team.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      I was able to observe the TDM time slot arrangement and to measure audio levels from the EVB using the "snapshots" in the provided PPC3 configuration file.

      When using "Snapshot 2" (Audio Out / In) the AUDIO OUT level in SLOT 0 is comparable to the audio input level, however, the AUDIO IN level in SLOT 4 is attenuated by about 30 dB vs. the input level.

      When using "Snapshot 3" (V-Sense / I-Sense) the V-SENSE level in SLOT 0 is ~10 dB lower than the audio input level.

      The audio input is a -35 dBFS 1 kHz sine wave (measured at SDIN) and the audio amplitude at the loudspeaker is ~55 mV.

      Please refer to the screen shots below and advise if these are expected results.  Am I testing it correctly?

      Thanks, O.R.

      TDM time slot arrangement in "Snapshot 2" Audio In / Out:

      Audio input levels (SDIN):

      TDM bus AUDIO OUT / IN levels ("Snapshot 2" SDOUT):

      TDM bus (V-SENSE / I-SENSE levels ("Snapshot 3" SDOUT):

      Audio level at loudspeaker:

    • Hi Oren,

      Your observed values are as expected. For I and V sense data specifically, you can refer to the full scale equivalent value from data sheet (2A and 14Vpk respectively) to calculate the actual measured value.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      I applied your mono example file settings to one of our stereo PPC3 files and achieved a valid output on the TDM bus (Audio Out from the left and right amplifiers on different slots), except that the logic level is only 1.2 V.  (Decoded correctly by the UPV analyzer when I changed its logic level setting.)

      - What needs to be changed for 1.8 V logic on the TDM bus?
      - I noticed that the Audio Out data is only 16-bit, which was also the case with the example file.  (This is readily apparent when scope display persistence is turned on.)  Is this expected?  Can the Audio Out data be 24-bit?
      - What do the "Bus Keeper", "Bus Keeper Config", and "LSB Config" bullets do? 
      - The Playback panel settings are grayed out.  How can the SBCLK/FS ratio be set to 64?  (I was able to change it at one time but it had no effect.)

      Please refer to the screenshots below and advise what settings need to change.

      Thanks, O.R.

      TDM time slot arrangement in EC Debug (Audio Out LEFT in Slot 0 and Audio Out RIGHT in Slot 4):
      (Note lower logic high vs. output with example PPC file.)

      TDM SDOUT from EVB (Audio Out LEFT and Audio Out RIGHT levels comparable to input level.):

      Channel 1 LEFT Receiver Configuration:

      Channel 1 LEFT Transmitter Configuration (Audio Out Slot 0):

      Channel 2 RIGHT Receiver Configuration:

      Channel 2 RIGHT Transmitter Configuration (Audio Out Slot 4):

    • Hi Oren,

      • Perhaps something has to be changed from mono to stereo, since you're using a mono configuration in a stereo setup. There should be only 1 device set as Bus Keeper, and both can be set to Transmit Hi-Z during unused bits. My guess is one of the devices is controlling SDOUT while the other one is pulling it down, thus getting lower logic level.
      • I assume it would be helpful if I share the same set of tuning files but in stereo mode?
      • You can change the length by adjusting IVMON_LEN bits in register 0x08, I was looking for it on the GUI but was not able to find it. I'm checking about this one with our software team.
        IVMON_LEN will control the output data of IVsense, Temp/Excursion or Audio In/Out, whichever is selected at the output selector.
      • There is further description of bus keeper in data sheet page 44.
        • Bus keeper is toggling TX_KEEPEN
        • Bus keeper config is toggling TX_KEEPLN
        • LSB config is toggling TX_KEEPCY
      • You should be able to change Playback settings by using Advanced mode on the top-center of Device Control panel.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      • I experimented with various combinations of setting "Unused bit field fill" to "Transmit 0" and "Transmit Hi-Z" and observed correct logic levels depending on which setting combination was used.  The "Bus Keeper" settings didn't seem to have any effect.  It would be best if you would send an example stereo file that illustrates best practices.  (Please send through our local TI FAE.)
      • I was able to change IVMON_LEN to 10 by sending I2C commands and observed 24-bit data but the amplitude was very low.
      • The Playback settings are grayed out in Advanced mode so I can't change them, see screen shot.

      Please refer to the screenshots below and advise.

      Thanks, O.R.

      1) Transmit Hi-Z On Both L&R, No Bus Keeper:

      2) Transmit 0 on Left; Hi-Z on Right:

      3) Transmit Hi-Z on Left; 0 on Right:

      4) Transmit Hi-Z on Both L&R, Bus Keeper Set on Left:

      5) Transmit Hi-Z on Both L&R, Bus Keeper Set on Right:

      6) Transmit Hi-Z Both, Bus Keeper on Left, IVMON_LEN = 10 for 24-bit set by I2C:

      Grayed-out Playback settings in Advanced mode:

    • Hi Oren,

      I'll share the stereo configuration files when I'm back in office on Tuesday.

      I noticed the playback settings are only accessible in ROM mode, however device should be able to work for a ratio of 64, are you having any issues with that setup? I'll double check but my understanding is that the configuration from End System Integration is enabling autodetect feature.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      I received the example stereo PPC3 file, thank you.  Re: Snapshot 2...  I noticed that “Bus Keeper”, “Bus Keeper Config”, and “LSB Config” are checked for Channel 1 while only “LSB Config” is checked for Channel 2.  What is the rationale for this setting combination?

      We are still sorting things out on our hardware but SBCLK/FS Auto Detect seems to be working correctly per this waveform capture:

      Thanks, O.R.

    • Hi Oren,

      Good to know you're getting correct waveforms now.

      Only 1 device in the bus should be set as bus keeper, otherwise there may be conflict on holding the bus. For the same device, bus keeper feature should be always active. LSB config is used for only half of the cycle to prevent conflict between LSB and MSB from adjacent slots.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      Please confirm...  "Bus Keeper" and "Bus Keeper Config" are both checked on one device in a dual device system.  "LSB Config" is checked on both devices.  We aren't using adjacent slots so, if I understand correctly, "LSB Config" shouldn't make a difference in our setup.  Here are screen shots to illustrate:

      Channel 1:

      Channel 2:

      Thanks, O.R.

    • Hi Ivan,

      Another thing...  On the "Receiver" tab in "Slot Select Config", what is the difference between selecting, for example, "Mono with slot as I2C address offset" vs. just selecting "Mono left channel"?

      Thanks, O.R.

    • Hi Oren,

      Regarding your first post, that is correct. I wouldn't expect any considerable difference if enabling or not LSB Config.

      There are basically two types of receiver configuration:

      • Selecting "Mono with slot as I2C address" means the device will be automatically selecting I2S slot based on the ADDR_SPICLK pin configuration, eg. address 0x4c = slot 0, 0x4d = slot 1, etc.
      • In case of Mono Left, Mono Right or Stereo Downmix, slots would depend on your specific slot configuration, then you can select only one of a mix of both.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      I just noticed that when I toggle to ROM Mode the TDM transmitter options revert from "Audio In / Audio Out" to "V-Sense / I-Sense".  Can you confirm that "Audio In / Audio Out" for ASI Record Channel selection is allowed in ROM Mode and advise how to configure for it?

      Thanks, O.R.

    • Hi Oren,

      In ROM mode only IV sense data is available, since algorithm is not running Audio In/Out and Estimated Temp/Excursion are not available in this mode.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan,

      Did you find out if there is a way other than I2C writes to change IVMON_LEN[1:0] (Page 0x00 Register 0x08, bits 7-6) in PPC3?

      Thanks, O.R.

    • Hi Oren,

      There is no GUI option on the current release of PPC3, however we have an updated version that enables IVMON_LEN as part of the GUI settings. There is no release date defined for this version but I can share an offline installer if you want to try it.

      Best regards,
      -Ivan Salazar
      Applications Engineer

    • Hi Ivan, please share the installer via our local TI FAE.  Thanks, O.R.

    • Hi Oren,

      Sure I'll share this offline.

      Best regards,
      -Ivan Salazar
      Applications Engineer