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PCM5242: Tie SCK/BCK input

Shinji Tsuji
Genius 14169 points
Part Number: PCM5242

Hi team,

Is that OK to tie MCLK(SCK) pin and BCLK pin together to provide 256*fs in slave mode operation?

fs=48kHz

The data source comes from A2B at TDM which doesn't have the master clock, so I want to configure the device as 

8.8.2 Clock Slave Mode With Master Clock(SCK) Input(4 wire I2S) and tie SCK and BCLK.

regards,

  • 0
    TI__Mastermind 30711 points

    Hello Shinji,

    Basically in essence you  are trying to use 3wire I2S, in that case simply connect SCK to GND and you should be okay. 

    Regards,

    Arash

  • 0 in reply to Arash Loloee
    TI__Genius 14169 points

    Hi Arash,

    I pan to use TDM8 48kHz 32bit = BCLK = 12.288MHz 

    "8.8.3 Clock Slave Mode with BCK PLL to generate Internal Clocks (3-Wire PCM) "

    It is described that the Specific BCK rates are required to generate an appropriate master clock in Table 33.

    From this  table, BCK can only be selected from 32*fs or 64*fs, while I would like to use 256*fs.

    Is that possible to configure it as 256*fs?

    From the table 32, it seems SCK input can be 256*fs if it is independently input. 

    regards,

  • 0 in reply to Shinji Tsuji
    TI__Mastermind 30711 points

    Hello.  Even if you use a separate SCK of   50MHz, still  BCK has a limit of  24.576MHZ (refer to table 7.8 Timing Requirements) which is mentioned in table 33 as well.

    To configure the PLL  please refer to :Table 36. PLL Configuration Recommendations. That is where you can configure your PLL  clk.

    Regards,

    Arash

  • 0 in reply to Arash Loloee
    TI__Genius 14169 points

    Hi Arash,

    In my configuration, BCK=SCK=256*fs(48kHz)=12.288MHz which meets the maximum BCK specification.

    It is described in "8.8.2 Clock Slave Mode With Master Clock (SCK) Input (4 Wire I2S)" that

    "In the presence of a valid bit SCK, BCK and LRCK in software mode, the device will autoconfigure the clock tree and PLL to drive the miniDSP as required."

    In my configuration (4 Wire I2S, SCK=BCK=12.288MHz, fs=48kHz), do I need to manually configure the PLL, or should it be automatically set as datasheet description?

    regards,

  • +1 in reply to Shinji Tsuji
    TI__Mastermind 30711 points

    Yes , for 4 wire I2S in software mode ,it will be auto detected and you don't need to set up the PLL manually.

    Regards,

    Arash