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PCM1840: Modulator Clock

user5163865
Genius 4120 points

Part Number: PCM1840

Hi,

Sorry for the basic question.
The customer inquired about the ADC clock frequency before decimation. How is the "Delta-Sigma Modulator" clock defined?

Looking at the data sheet P15, there is a description of "system clock" and "MCLK". I think this is the clock of the "Delta-Sigma Modulator", is that correct?

Also, how is the relationship between this "system clock" and "MCLK" and the actual clock signal source (BCLK) defined?


Best regards,
Hiroshi

  • 0
    Genius 3945 points

    MCLK and "System clock" are synonymous. This is the clock that drives the modulator, which is why it has a frequency some large multiple (128x, 256x, 512x) of the sample frequency.

    BCLK is the serial data shift clock. For I2S interfaces, BCLK is 64x the sample rate. This is because the frame has 32 bits for the left-channel sample and 32 bits for the right-channel sample. It is usually a requirement that all of the audio clocks -- LRCLK (at the sample rate), BCLK (at the serial shift rate) and MCLK (for the modulator) be synchronous. The main clock generator, whatever it may be, can generate all of the clocks, or the system could have a divider that generates BCLK and LRCLK from MCLK.

    Some converters can work in either a master mode or a slave mode. For the former, the converter will take the MCLK as an input and generate LRCLK and BCLK with internal dividers. An ADC will output serial data synchronous to BCLK framed by LRCLK. A DAC will accept serial data input synchronous to BCLK framed by LRCLK.

    A converter that works in slave mode has all three clocks as inputs, so some external source must create them.

  • 0 in reply to Andy Peters
    TI__Mastermind 23030 points

    Is this answering your question?

  • 0 in reply to Sanjay Dixit
    Genius 4120 points

    Hi,

    Thank you for your reply immediately.
    This answer is sufficient for the customer's question.

    Thank you again for the detailed explanation.

    Best regards,
    Hiroshi