TLV320AIC34: Effect of jitter on performance

Marvn Arcangel

Part Number: TLV320AIC34

Hi Team,

Our customer would like to know how the performance of the TLV320AIC34 Codec would be affected if the Master Clock (MCLK) had a lot of jitter on it? for example, if we need to clock it with a synced 12MHz master clock, which is re-synced every 725.624uS with a +/- 100nS Jitter.

I hope you could help.

Regards,

Marvin

over 3 years ago

0 pdjuandi over 3 years ago

TI__Mastermind 29765 points

Hi,

Clock stability and synchronization are very important in audio, the effect of this jitter will result in unwanted audio noise.

I have provided links below on audio noise and clock synchronization:

https://www.ti.com/lit/an/slaa749/slaa749.pdf?ts=1645218595454&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTLV320AIC34

https://www.ti.com/lit/an/slaa469a/slaa469a.pdf?ts=1645219236487&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTLV320AIC3256

0 Marvn Arcangel over 3 years ago in reply to pdjuandi

TI__Genius 13950 points

Hi Pdjuandi,

I got a follow-up from the customer. they would like to know specifically if they were to have a regular +/- 150 nS jitter on the MCLK would this be a problem with it staying in lock and maintaining the wanted sample rate 44.1kHz?

Thank you.

Regards,

Marvin

0 Brian Donoghue over 3 years ago in reply to Marvn Arcangel

TI__Intellectual 2620 points

Hi Marvin,

Just FYI, Peter is out of office today but will be able to get back to you early next week.

I am wondering how you can have 150ns of jitter on a 12MHz clock, that seems like a lot of jitter since the clock period is only 83ns. Can you provide a scope shot of the clock in question?

Brian

0 Marvn Arcangel over 3 years ago in reply to Brian Donoghue

TI__Genius 13950 points

Hi Brian,

Thank you for the information. I will get this details from the customer.

Regards,

Marvin

0 Marvn Arcangel over 3 years ago in reply to Marvn Arcangel

TI__Genius 13950 points

Hi Brian,

They were unable to provide a scope shot because they have not completed the design of the hardware yet, but the 'jitter' as such is more like a synchronization adjustment to the clock which is according to the customer, is likely to course a 'click' at least.

the customer are doing synchronization across an IEE 1588 Ethernet Backplane and currently see up to 150nS of jitter.

I hope this information helps.

Regards,

Marvin

0 pdjuandi over 3 years ago in reply to Marvn Arcangel

TI__Mastermind 29765 points

Hi Marvin,

This jitter from MCLK will carry into the other clocks like WCLK and BCLK which in turns will affect the setup, hold time or delay time of the I2S interface.

A click sound which is an unwanted noise is not acceptable in most of our customers, so we don't really recommend clock with jitter.

Regards.

0 Marvn Arcangel over 3 years ago in reply to pdjuandi

TI__Genius 13950 points

Hi Peter,

The customer has a follow-up question. Can you confirm as you indicate this will still be a problem even if they do not use the internal PLL?

Thanks,

Marvin

0 pdjuandi over 3 years ago in reply to Marvn Arcangel

TI__Mastermind 29765 points

Yes, it applies there as well.

Audio

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TLV320AIC34: Effect of jitter on performance