TAS5805M: I2C bus Timing requirements

Hideki Hayashi1

Part Number: TAS5805M

Hi team,

There are decription in I2C bus timing requiremnts 1.3us min in "Low period of the SCL clock". The I2C fast mode is 400kbps, so the low period will be 1/400k *1/2 = 1.25us. Why is the minimum 1.3us? Where's my understandings incorrect?

Best regards,

Hideki

over 2 years ago

0 Shadow He over 2 years ago

TI__Mastermind 39440 points

Hi Hideki

In I2C's logic, low level period is more important than high level for SCL. You can see below picture in our datasheet shows this.

Also below table comes from I2C standard.

0 Hideki Hayashi1 over 2 years ago in reply to Shadow He

TI__Expert 7440 points

Hi Shadow,

Did you mention customer shouldn't use 50% Duty in fast mode? In fast mode, Maximum duty should be 1- 1.3us *400kHz = 48%, minimum duty should be 0.6us *400kHz = 24%, right?

Best regards,

Hideki

0 Shadow He over 2 years ago in reply to Hideki Hayashi1

TI__Mastermind 39440 points

Hi Hideki

Yes, that's the standard requirement.

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TAS5805M: I2C bus Timing requirements