PCM1681: SRST Bit in Register 10

Hello, 

The SRST  operation is the same as the power-on-reset function ,  with the exception of the reset period, which is 1024 system clocks for the SRST function. All registers are initialized upon activating this bit.  So  by writing a one,  it toggles the reset function and  then initializes  all registers back to default . From datasheet the power on reset is explained as below:

The PCM1681 and PCM1681-Q1 include a power-on-reset function. Figure 22 shows the operation of this function. With the system clock active and VDD > 2.2 V (typical, 1.4 V to 2.9 V), the power-on-reset function is enabled. The initialization sequence requires 65,536 system clocks from the time VDD > 2.2 V. VDD must rise up with a ramp-up rate greater than 1V/ms to ensure reliable initialization. After the initialization period, the PCM1681 and PCM1681-Q1 are set to the respective reset default state, as described in the Mode Control Registers section of this data sheet. During the reset period (65,536 system clocks), the analog output is forced to the common voltage (VCOM), or VCC/2. After the reset period, the internal register is initialized in the next 1/fS period and if SCK, BCK, and LRCK are provided continuously, the PCM1681 and PCM1681-Q1 provide the proper analog output with group delay corresponding to the input data.

Regards,

Arash