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TAS5713 , Operation without MCLK ?

Lior Albaz
Prodigy 20 points
Other Parts Discussed in Thread: TAS5713

I 'm using TAS5713  in my design and that output are always at soft mute mode (50% duty cycle in AD mode). 
I do not use MCLK and from other post on MCLK topic I understood that MCLK is a must for TAS7xxx. 

1. Is it true for the TAS5713 as well ?
    The datasheet is not clear about the need of MCLK and it mention automatic detection mecanisim. 

2. If MCLK is omit, does the PWM output will be at soft mute (50% duty cycle in AD mode) or hard mute (tri-state) ?

3. At what state I2S signal should be stable ?
    i.e. before release reset  signal,  before exist SD or at any time ? 

Thanks.

  • 0
    TI__Guru**** 189401 points

    Hi, Lior,

    Yes, TAS5713 needs MCLK.

    I believe it will go in soft mute w/o MCLK. the I2C is still active, though.

    Our part is very flexible wrt I2S.

    -d2

  • 0 in reply to Don Dapkus
    Prodigy 10 points

    Don:

    Can you clarify this statement from the Datasheet:  (Page 23)

    The clock section
    uses MCLK or the internal oscillator clock (when MCLK is unstable, out of range, or absent) to produce the
    internal clock (DCLK) running at 512 times the PWM switching frequency.

    This leads me to believe that I do not need MCLK!   It sounds like that the internal oscillator can be used when MCLK is not available.  

    I have an application where an audio device give me SCLK, LRCLK and SDIN but not it's MCLK.     Do you see a simple workaround?

    -Eli

  • 0 in reply to Eli Hughes
    TI__Mastermind 22965 points

    Hi Eli,

    The statement  -- "The clock section uses MCLK or the internal oscillator clock (when MCLK is unstable, out of range, or absent) to produce the internal clock (DCLK) running at 512 time the PWM switching frequency.".......

    ......is trying to convey that the device internal clock (DCLK), which is an internal clock only needed for device operation, is typically derived from the external MCLK, however if there is a problem with MCLK, the device is capable of using it's internal oscillator clock to generate the internal DCLK, so that device continues normal operation (i.e idle PWM switching activity and I2C communication will continue). However, since the audio format is I2S, and MCLK is a requirement of the I2S protocol, the device wont be able to play audio.

    If LRCLK is 44.1K or 48K, one option is to use SCLK = 64xFS = MCLK, i.e. use same clock for SCLK & MCLK. Note that this is only valid for Fs rate of 44.1K or 48K.

    - Ravi