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TLV320ADC5140: TLV320ADC5140 CMRR question

Will He
Prodigy 40 points
Part Number: TLV320ADC5140
Other Parts Discussed in Thread: TLV320ADC6140

I' m from Tymphany EE and using the TLV320ADC5140 ADC for our amplifier.

Here I have a few question about the CMRR test condition definition and it's tolerance  with different input level and frequency.

  1. The TLV320ADC5140 data sheet only state the CMRR typical is 60dB at 1KHz  but doesn't mention the minimum and maximum. Does the testing condition are based on the DRE function disable?
  2. We want to know how the frequency ,input level and the threshold and maximum gain of DRE influence the CMRR result?
  3. what is CMRR work principle in ADC? We did measurement there is no DC offset between the balance input positive/ negative).How does it make the CMRR loose, Is it caused by the PGA gain tolerance?
  4. We found that the tlv320adc6140 has better noise performance 3dB better than tlv320adc5140 but both state the CMRR are same 60dB typical in spec.  Can we also expect an improvement in the CMRR? Higher value or less variation?
  5. What reduction in CMRR is expected when DRE is enabled? At what signal levels?

Here is our debugging:

  1. We need the DRE function to improve the noise and our currently setting for DRE is -24dB Threshold and 20dB maximum gain. Based on the setting to measure the CMRR at 1KHz with100mVpp condition and found that the CMRR performance is a big variation from 46dB to 77dB between different CH and different chipset. After disable the DRE function then the CMRR variation smaller than before also can meet the spec typical 60dB（Check 5pcs sample).
  2. We try to reduce the DRE Threshold from -24dB to -54dB even down -66dB it doesn't to the CMRR.
  3. We try to reduce the DRE maximum from 20dB to 10dB  it does to the CMRR but make the noise worse almost double can't meet our requirement. Then try to increase DRE maximum gain to 14dB to balance the CMRR and noise but the doesn't help to CMRR.

Thanks and waiting for your support!

  • 0
    TI__Mastermind 48855 points

    Hi Will,

    The testing condition is likely without DRE. But if there was no maximum or minimum documented we can only guarantee typical performance. Since the 6140 and 5140 have the same typical CMRR, you can't expect an improvement. They are probably very similar in variation.

    We don't know what CMRR Reduction is expected when DRE is enabled as it wasn't tested. My understanding is that they are only indirectly related to one another. 

    The CMRR is to reject common noise on the input pins, even though there is no DC offset.

    I will reach out to our design team to get some clarity on the relationship between CMRR and DRE.

    Best regards,

    Jeff

  • 0 in reply to Jeff McPherson
    Prodigy 40 points

    Hi Jeff,

    Thanks a lot for your reply.

    I expect to get this relationship between CMRR and DRE. 

  • +1 in reply to Will He
    TI__Mastermind 48855 points

    Hi Will,

    The DRE adjusts the PGA gain dynamically to extend the dynamic range. This causes the differential gain to change, which might result in the various CMRR values that you're measuring. Because of this, CMRR with DRE enabled isn't very meaningful as a spec. That's why it's not mentioned. 

    Those are my suspicions but unfortunately we just don't have that kind of testing data on this case.

    Best regards,

    Jeff 

  • +1 in reply to Jeff McPherson
    Prodigy 40 points

    Hi Jeff,

    Thanks ！Seems there is a trade-off between the dynamic range and CMRR. Enabling DRE might result in the various CMRR value but improve the dynamic range.