This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TAS2560: ERROR_CLASSD_PWR

Part Number: TAS2560

Hi,

After TAS2560 bring up,there have interrupts in log, such as [  406.581395] tas2560s 6-004c: irq_print, Critical ERROR B[0]_P[0]_R[42]= 0x0

it looks this error is ERROR_CLASSD_PWR, please advise how to fix it. 

Schematics as below.

Thanks
Best regards
Chris.
  • Hi Chris,

    The mentioned register Book 0 Page 0 Register 42 (0x2A) contains the power control bits for the different blocks in the device. This means the device is basically not powered up.

    Can you confirm the registers are written correctly during initialization?
    Two devices are used on the schematic, do you know if both show the same error?
    Can you also read the interrupt registers 0x26 and 0x27?

    Best regards,
    -Ivan Salazar
    Applications Engineer

  • Hi Ivan,

    Two devices are used on the schematic, do you know if both show the same error?
    --> Yes, I have check the registers value, both show the same error.


    Can you also read the interrupt registers 0x26 and 0x27?
    --> The value of both registers 0x26 and 0x27 is 0x0 for two devices. And log didn't show the reference error.

    Can you confirm the registers are written correctly during initialization?

    --> I have dump the register(reg.zip) for your reference.


    Additional question, Should I not perform tas2560 enable when I am not playing anything (which means no I2S clock input)?

    Thanks.

    Best regards

    Chris

    reg.zip

  • Hi Chris,

    Regarding your last question, you should not interrupt I2S clocks while the device is enabled. If you have to stop the clocks you should first power down the device through register 0x07 PWR_DEV = 0h.

    Stopping the clocks with device enabled would trigger clock error detection. Alternatively you can disable clock error detection using register 0x21 bits 1-0, however audio distortion could happen when audio is resumed and clocks are back after being halted for some time.

    Best regards,
    -Ivan Salazar
    Applications Engineer