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TAS5711 SE output configuration

1741025
Prodigy 55 points

Other Parts Discussed in Thread: TAS5711

Hi,

I am new to digital amp from TI. We will be using TAS5711 for our new project with 2.1 system. From the EVM reference design, the return path of the SE output is connected with 2x capacitor & 2x resister which as the diagram below. Is it possible to use the single cap topology? And how does the single cap topology taking care of the PWM turn ON/OFF timing and pop noise issue? 

btw, this SE output is going to mid-high or tweeter, so i do not need to have very low frequency. If I MUST use the configuration as the diagram attached, can I use 2x 47uF cap? and finetune the resister R17/R18?

thanks in advance.. 

 

  • 0
    TI__Guru**** 189401 points

    Hello, 1741025,

    Nice to meet you! Thank you for your interest in TI products.

    We refer to that architecture as a "split-cap" configuration, which, along with the two resistors, R17 and R18, forms a mid-rail voltage for the other side of the speaker. We do this to prevent pop (putting a single capacitor in series with the speaker will result in some pop). R17 and R18 just hold the middle of the capacitors at PVDD/2.

    You can certainly use smaller caps if you are driving a tweeter. The frequency response is: fc = 1 / (2*pi*RL*C) where RL is your load resistance, and C is the parallel combination of C38 and C39.

    -d2