TLV320ADC6140: I2S Slave Mode with external Master Clock

Shall reply onNov 28

Please download the Pure Path Console tool. It can help set up a Manual configuration for the device

Good morning, thank you very much for your reply. Unfortunately I've already tried with the Pure Path Console, but I can't configure the PLL settings correctly. The outgoing I2S data, if the automatic PLL control is not activated, is always corrupted. Is there a guide to setting up the PLL?

Please send me a screen shot of the PPC3 PLL Configuration you make

This is my PLL configuration. 

You have to give input to BCLK . The Highest allowed frequency is 25Mhz

I tried to change the input to BCLK, but nothing changed. I tryed also change the "Sample Rate Multiple" to 44.1KHz, but notihng changed. I saw that in the two configurations 48Khz or 44.1KHz the values on PPC3 have changed, but the registers I send to the ADC do not change. Am I doing something wrong?

Are you using a combination of the EVM and PPC3? If so after changing the settings you have to go from inactive to active for the new settings to load.

Unfortunately we do not have EVB.. We are using our system.

How can I write these registers? 

"PDIV"

PLL "J" and "D"

"N_DIV"

"M_DIV"

Shall reply tomorrow

These settings are currently not provided to customers. The Automatic configrations are tested for functionality and reliability and are recomended. With manual settings you might encounter issues with certain timings. In order to avoid this we suggest auto configuration