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How to interface MCU with PCM CODEC: TLV320AIC1106?

krowiak
Prodigy 10 points
Other Parts Discussed in Thread: TLV320AIC1106

Hi all!

In my project I am using TLV320AIC1106 CODEC from TI (datasheet attached). I have some issues with how it should be interfaced to MCU:

* on page 10 there is a graphical description of how the transmission is done. I get the idea that in one time-slot there are 2048MHz/8kHz=256 samples... How does it corresponds to 16/8 bits of data frame? In other words: how I am supposed to see the transmission algorithm? Is it like this: transmission starts on PCMSYNC=1, data frame of 16/8 bit is sent and remaining 240/248 bit-slots are not meant to be read/written to?

* There is description of MCLK requirements on page 9:
MCLK frequency 2.048 MHz
MCLK jitter 37%
MCLK clock cycles per PCMSYN frame 256 cycles
Is MCLK jitter here is frequency or phase jitter? The difference is pretty crucial - cause with frequency jitter I could be able to put on MCLK values of 2.048MHz+/-(37%/2). The problem is that I am able to generate MCLK of value 2MHz not exact 2.048MHz so also the sampling frequency lowers to 2MHz/256=7.8125kHz.

* I am experiencing problems - there is no sound on the output of CODEC (EAROUT+/-) while I am feeding PCMI with standard DTMF tones. Could this be a result of wrong clock value? Is it rather problem with algorithm?

I can provide hardware interface description I have built if necessary. Thank you for your consideration!


Best regards,
radzick

  • 0
    Prodigy 30 points

    Hi Radzick

    As I know,the MCLK jitter is about phase,not frequency.So the MCLK should be very close to 2.048M.

     

     

    Best regards,

    yang

  • 0 in reply to yang zhang89371
    Mastermind 7395 points

    PCM-30 at 2.048bits/s is a standard born in telephony. Each time slot, when using u-law compression, is 8 bits wide. So you would have 32 time slots on a frame. On the original PCM-30, time slots 0 and 16 were used for frame and multiframe synchronization, that is why only 30 time slots were available for voice.

    I suppose that if you use linear PCM encoding, you take the space of two contiguous time slots. I understand that by building the PCMSYNC as needed, based on the PCM frame, you can get data from and to any PCM slot.

    yang's response is right, your frequency must be exactly 2.048MHz. 37% of jitter means that the phase variations of your MCLK can be up to 37% off the position where an ideal, jitter-free clock edges would appear.

     

  • 0 in reply to Avi Chami1
    Prodigy 30 points

    Hi Albert_83,

    But I have a detailed question about the PCM data format.You know,the resolution of AIC1106 is 13bit/8bit.In linear mode,each frame is 16bits wide,so i want to know the meaning of  each bit in the frame.Besides,I wonder the data is unsigned or signed.Can you help me?Thank you. 

    Best regards,

    yang

  • 0 in reply to yang zhang89371
    Mastermind 7395 points

    I am sorry, I don't know the linear format in depth, I have always worked with u-law and A-law compressed formats which have 8-bits per time slot. I suppose that the documentation for the EVM could point you in that direction.