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TAS6424-Q1: There is no sound after the customer changes the frequency of MCLK from 12.288MHz to 24.576MHz.

Alan Xia
Genius 9970 points
Part Number: TAS6424-Q1
Other Parts Discussed in Thread: TAS6424,

Hi Team，

When customers use TAS6424, they use TDM signal. After they change MCLK from 12.288MHz to 24.576MHz, there is no sound.

According to the Datasheet, I think the ratio of FSYNC, MCLK and SCLK does not meet the requirements, as follows:

At this time, in addition to modifying the frequency of FSYNC in the SAP register to 96kHz, what else do we need to do?

How should 256xFs be configured?

  • 0
    TI__Mastermind 45085 points

    Hi Alan,

    Is this TDM4 or TDM8?  In TDM mode the MCLK and SCLK can be tied together.  The source must provide the correct ratio for the bit-width, the number of slots, and Fs.  The TAS6424 will automatically adjust if the MCLK, SCLK, FSYNC, and TDM (SDIN) are set up correctly.  If the ratios are incorrect, the device will not decode it correctly.

    If you need more help, please send more information about the digital clocks, slots, bit-width, and anything else that would be helpful.

    Regards,
    Gregg Scott

  • 0 in reply to Gregg Scott
    TI__Genius 9970 points

    Hi Gregg,

    It is TDM8.

    Soc is output according to 48k sampling, and it can make sound normally: 48k (fs)*8 slots*32bit = 12.288M (mclk+sclk)
    Due to special reasons, it needs to be changed to: 48k (fs) * 16 slots * 32bit = 24.576M (MCLK+SCLK), the test is silent.

  • 0 in reply to Gregg Scott
    TI__Genius 9970 points

    Hi Gregg,

    Let me add some information: The reason they changed the clock is because they want the internal power amplifier and the external power amplifier to share the same SCLK (MCLK).

    The external power amplifier is TDM16, the SLOT is 16, and the clock frequency is 24.576kHz. From a theoretical point of view, my idea is whether they should modify the Sample Format of the built-in power amplifier to 8bit slot in 16bit on the MCU/DSP side, and then TAS6424-Q1 will automatically adjust the frequency.

  • 0 in reply to Gregg Scott
    TI__Genius 9970 points

    Hi Gregg，

    latest progress:
    My suggestion to the customer is: change the format of SDIN SAMPLE from TDM8 to TDM16, the first 8 SLOTs are audio data, and the last 8 SLOTs are filled with 0. The test result is no sound.
    Does TAS6424-Q1 need to configure related registers?

  • 0 in reply to Alan Xia
    TI__Guru 52090 points

    Hi Alan

        I'm really sorry TAS6424 device seems not support TDM16 input, the maximum is TDM8 format. By using TDM16, the clock rate can't match the requirement, device can't recognize the audio data.