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TLV320ADC5140: About TDM data line no data output.

dani.fengd
Prodigy 10 points
Part Number: TLV320ADC5140

Hi team,

Now I use two tlv320adc5140 to support 8 analog mic.But I have some problems.In TDM mode, tlv320adc5140 is slave.

After successfully writing to the register through i2c,the TDM data line has no data output.

I want to know if the current register configuration is correct?Why does TDM data line have no data output?

The register values are written as follows：

adc1： i2c address 0x4C

static struct DEV_REG adc1_reg_values[] = {
{ ADCX140_PAGE_SELECT, 0x00 },
{ ADCX140_SW_RESET, 0x00 }, 
{ ADCX140_SLEEP_CFG, 0x81 }, 
{ ADCX140_SHDN_CFG, 0x05 }, 
{ ADCX140_ASI_CFG0, 0x31 }, 
{ ADCX140_ASI_CFG1, 0xA0 }, 
{ ADCX140_ASI_CFG2, 0x00 }, 
{ ADCX140_ASI_CH1, 0x00 }, 
{ ADCX140_ASI_CH2, 0x01 },
{ ADCX140_ASI_CH3, 0x02 },
{ ADCX140_ASI_CH4, 0x03 },
{ ADCX140_ASI_CH5, 0x04 },
{ ADCX140_ASI_CH6, 0x05 },
{ ADCX140_ASI_CH7, 0x06 },
{ ADCX140_ASI_CH8, 0x07 },
{ ADCX140_MST_CFG0, 0x02 }, 
{ ADCX140_MST_CFG1, 0x48 }, 
{ ADCX140_ASI_STS, 0xff }, 
{ ADCX140_CLK_SRC, 0x10 },
{ ADCX140_PDMCLK_CFG, 0x40 },
{ ADCX140_PDM_CFG, 0x00 },
{ ADCX140_GPIO_CFG0, 0x22 }, 
{ ADCX140_GPO_CFG0, 0x00 },
{ ADCX140_GPO_CFG1, 0x00 },
{ ADCX140_GPO_CFG2, 0x00 },
{ ADCX140_GPO_CFG3, 0x00 },
{ ADCX140_GPO_VAL, 0x00 },
{ ADCX140_GPIO_MON, 0x00 },
{ ADCX140_GPI_CFG0, 0x00 },
{ ADCX140_GPI_CFG1, 0x00 },
{ ADCX140_GPI_MON, 0x00 },
{ ADCX140_INT_CFG, 0x00 },
{ ADCX140_INT_MASK0, 0xff },
{ ADCX140_INT_LTCH0, 0x00 },
{ ADCX140_BIAS_CFG, 0x60 }, 
{ ADCX140_CH1_CFG0, 0x00 }, 
{ ADCX140_CH1_CFG1, 0x0c }, 
{ ADCX140_CH1_CFG2, 0xff }, 
{ ADCX140_CH1_CFG3, 0x80 }, 
{ ADCX140_CH1_CFG4, 0x00 }, 
{ ADCX140_CH2_CFG0, 0x00 },
{ ADCX140_CH2_CFG1, 0x0c },
{ ADCX140_CH2_CFG2, 0xff },
{ ADCX140_CH2_CFG3, 0x80 },
{ ADCX140_CH2_CFG4, 0x00 },
{ ADCX140_CH3_CFG0, 0x00 },
{ ADCX140_CH3_CFG1, 0x0c },
{ ADCX140_CH3_CFG2, 0xfa },
{ ADCX140_CH3_CFG3, 0x80 },
{ ADCX140_CH3_CFG4, 0x00 },
{ ADCX140_CH4_CFG0, 0x00 },
{ ADCX140_CH4_CFG1, 0x0c },
{ ADCX140_CH4_CFG2, 0xff },
{ ADCX140_CH4_CFG3, 0x80 },
{ ADCX140_CH4_CFG4, 0x00 },
{ ADCX140_CH5_CFG2, 0xc9 }, 
{ ADCX140_CH5_CFG3, 0x80 }, 
{ ADCX140_CH5_CFG4, 0x00 }, 
{ ADCX140_CH6_CFG2, 0xc9 },
{ ADCX140_CH6_CFG3, 0x80 },
{ ADCX140_CH6_CFG4, 0x00 },
{ ADCX140_CH7_CFG2, 0xc9 },
{ ADCX140_CH7_CFG3, 0x80 },
{ ADCX140_CH7_CFG4, 0x00 },
{ ADCX140_CH8_CFG2, 0xc9 },
{ ADCX140_CH8_CFG3, 0x80 },
{ ADCX140_CH8_CFG4, 0x00 },
{ ADCX140_DSP_CFG0, 0x01 }, 
{ ADCX140_DSP_CFG1, 0x40 }, 
{ ADCX140_DRE_CFG0, 0x7b }, 
{ ADCX140_AGC_CFG0, 0xe7 }, 
{ ADCX140_IN_CH_EN, 0xf0 }, 
{ ADCX140_ASI_OUT_CH_EN, 0xf0 },
{ ADCX140_PWR_CFG, 0x00 },
{ ADCX140_DEV_STS0, 0x00 }, 
{ ADCX140_DEV_STS1, 0x80 },
};

adc2： i2c address 0x4D

static struct DEV_REG adc2_reg_values[] = {
{ ADCX140_PAGE_SELECT, 0x00 },
{ ADCX140_SW_RESET, 0x00 }, 
{ ADCX140_SLEEP_CFG, 0x81 },
{ ADCX140_SHDN_CFG, 0x05 }, 
{ ADCX140_ASI_CFG0, 0x31 }, 
{ ADCX140_ASI_CFG1, 0x80 }, 
{ ADCX140_ASI_CFG2, 0x00 }, 
{ ADCX140_ASI_CH1, 0x04 },
{ ADCX140_ASI_CH2, 0x05 },
{ ADCX140_ASI_CH3, 0x06 },
{ ADCX140_ASI_CH4, 0x07 },
{ ADCX140_ASI_CH5, 0x04 },
{ ADCX140_ASI_CH6, 0x05 },
{ ADCX140_ASI_CH7, 0x06 },
{ ADCX140_ASI_CH8, 0x07 },
{ ADCX140_MST_CFG0, 0x02 }, 
{ ADCX140_MST_CFG1, 0x48 }, 
{ ADCX140_ASI_STS, 0xff }, 
{ ADCX140_CLK_SRC, 0x10 },
{ ADCX140_PDMCLK_CFG, 0x40 }, 
{ ADCX140_PDM_CFG, 0x00 },
{ ADCX140_GPIO_CFG0, 0x22 }, 
{ ADCX140_GPO_CFG0, 0x00 },
{ ADCX140_GPO_CFG1, 0x00 },
{ ADCX140_GPO_CFG2, 0x00 },
{ ADCX140_GPO_CFG3, 0x00 },
{ ADCX140_GPO_VAL, 0x00 },
{ ADCX140_GPIO_MON, 0x00 },
{ ADCX140_GPI_CFG0, 0x00 },
{ ADCX140_GPI_CFG1, 0x00 },
{ ADCX140_GPI_MON, 0x00 },
{ ADCX140_INT_CFG, 0x00 },
{ ADCX140_INT_MASK0, 0xff },
{ ADCX140_INT_LTCH0, 0x00 },
{ ADCX140_BIAS_CFG, 0x60 }, 
{ ADCX140_CH1_CFG0, 0x00 }, 
{ ADCX140_CH1_CFG1, 0x0c }, 
{ ADCX140_CH1_CFG2, 0xff }, 
{ ADCX140_CH1_CFG3, 0x80 }, 
{ ADCX140_CH1_CFG4, 0x00 }, 
{ ADCX140_CH2_CFG0, 0x00 },
{ ADCX140_CH2_CFG1, 0x0c },
{ ADCX140_CH2_CFG2, 0xff },
{ ADCX140_CH2_CFG3, 0x80 },
{ ADCX140_CH2_CFG4, 0x00 },
{ ADCX140_CH3_CFG0, 0x00 },
{ ADCX140_CH3_CFG1, 0x0c },
{ ADCX140_CH3_CFG2, 0xfa },
{ ADCX140_CH3_CFG3, 0x80 },
{ ADCX140_CH3_CFG4, 0x00 },
{ ADCX140_CH4_CFG0, 0x00 },
{ ADCX140_CH4_CFG1, 0x0c },
{ ADCX140_CH4_CFG2, 0xff },
{ ADCX140_CH4_CFG3, 0x80 },
{ ADCX140_CH4_CFG4, 0x00 },
{ ADCX140_CH5_CFG2, 0xc9 }, 
{ ADCX140_CH5_CFG3, 0x80 }, 
{ ADCX140_CH5_CFG4, 0x00 }, 
{ ADCX140_CH6_CFG2, 0xc9 },
{ ADCX140_CH6_CFG3, 0x80 },
{ ADCX140_CH6_CFG4, 0x00 },
{ ADCX140_CH7_CFG2, 0xc9 },
{ ADCX140_CH7_CFG3, 0x80 },
{ ADCX140_CH7_CFG4, 0x00 },
{ ADCX140_CH8_CFG2, 0xc9 },
{ ADCX140_CH8_CFG3, 0x80 },
{ ADCX140_CH8_CFG4, 0x00 },
{ ADCX140_DSP_CFG0, 0x01 }, 
{ ADCX140_DSP_CFG1, 0x40 }, 
{ ADCX140_DRE_CFG0, 0x7b }, 
{ ADCX140_AGC_CFG0, 0xe7 }, 
{ ADCX140_IN_CH_EN, 0xf0 }, 
{ ADCX140_ASI_OUT_CH_EN, 0xf0 },
{ ADCX140_PWR_CFG, 0x00 }, 
{ ADCX140_DEV_STS0, 0x00 },
{ ADCX140_DEV_STS1, 0x80 }, 
};