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PCMD3180: PDMCLK not output on PCMD3180

Sam Wu
Prodigy 40 points
Other Parts Discussed in Thread: PCMD3180

Dear Ti member,

The input clock setting now we use is 24.576 MHZ (24.576MHz / 48kHz / 16 slots / 32 bits (32x16x48kHz=24.576MHz).) with two PCMD3180.

We are try to set some register to output the PDMCLK on PCMD3180.

But the PDMCLK get nothing output.

Do you know which register must be set if we want the PDMCLK output correctly?

Thanks,

Sam

  • 0
    Prodigy 40 points

    Below was the register settings now I used.

    {
    "book": "0",
    "page": "0",
    "register": "02",
    "mask": "ff",
    "data": "01",
    },
    {
    "book": "0",
    "page": "0",
    "register": "07",
    "mask": "ff",
    "data": "30",

    },
    {
    "book": "0",
    "page": "0",
    "register": "3c",
    "mask": "ff",
    "data": "40",
    },
    {
    "book": "0",
    "page": "0",
    "register": "41",
    "mask": "ff",
    "data": "40",
    },
    {
    "book": "0",
    "page": "0",
    "register": "46",
    "mask": "ff",
    "data": "40",
    },
    {
    "book": "0",
    "page": "0",
    "register": "4B",
    "mask": "ff",
    "data": "40",
    },
    {
    "book": "0",
    "page": "0",
    "register": "22",
    "mask": "ff",
    "data": "41",
    },
    {
    "book": "0",
    "page": "0",
    "register": "23",
    "mask": "ff",
    "data": "41",
    },
    {
    "book": "0",
    "page": "0",
    "register": "24",
    "mask": "ff",
    "data": "41",
    },
    {
    "book": "0",
    "page": "0",
    "register": "25",
    "mask": "ff",
    "data": "41",
    },
    {
    "book": "0",
    "page": "0",
    "register": "2b",
    "mask": "ff",
    "data": "45",
    },
    {
    "book": "0",
    "page": "0",
    "register": "2c",
    "mask": "ff",
    "data": "67",
    },
    {
    "book": "0",
    "page": "0",
    "register": "73",
    "mask": "ff",
    "data": "ff",
    },
    {
    "book": "0",
    "page": "0",
    "register": "74",
    "mask": "ff",
    "data": "ff",
    },
    {
    "book": "0",
    "page": "0",
    "register": "75",
    "mask": "ff",
    "data": "60",
    }

    "PRE_SHUTDOWN - Dev 1",
    {
    "book": "0",
    "page": "0",
    "register": "02",
    "mask": "ff",
    "data": "00",
    }

  • 0 in reply to Sam Wu
    TI__Genius 9790 points

    Hi Sam

    Kindly upload the picture, only software guy knows the json file. Thanks,

    BR

    Shenghao Ding

  • 0
    Prodigy 40 points

    This was all the register which I set.
    (dev2 the same as dev1)

      
     

  • 0 in reply to Sam Wu
    TI__Genius 9790 points

    In the conf-call, you have show me the regbin setting with cat command, can you share this picture?

  • 0 in reply to Shenghao Ding
    Prodigy 40 points

    Do you mean this picture? 

  • 0 in reply to Sam Wu
    TI__Genius 9790 points

    Yes, one more thing, dump the Page0 registers during recording. commands as following

    echo 0x00 >regdump

    cat regdump

  • 0 in reply to Shenghao Ding
    Prodigy 40 points

    Hi Shenghao,

    The result as below:

    dev_no: 0
    dev_name: pcm3180
    PGID: 0x00
    No-0:P0x00R0x00:0x00
    No-0:P0x00R0x01:0x01
    No-0:P0x00R0x02:0x01
    No-0:P0x00R0x03:0x00
    No-0:P0x00R0x04:0x00
    No-0:P0x00R0x05:0x05
    No-0:P0x00R0x06:0x00
    No-0:P0x00R0x07:0x30
    No-0:P0x00R0x08:0x00
    No-0:P0x00R0x09:0x00
    No-0:P0x00R0x0a:0x00
    No-0:P0x00R0x0b:0x00
    No-0:P0x00R0x0c:0x01
    No-0:P0x00R0x0d:0x02
    No-0:P0x00R0x0e:0x03
    No-0:P0x00R0x0f:0x04
    No-0:P0x00R0x10:0x05
    No-0:P0x00R0x11:0x06
    No-0:P0x00R0x12:0x07
    No-0:P0x00R0x13:0x02
    No-0:P0x00R0x14:0x48
    No-0:P0x00R0x15:0xff
    No-0:P0x00R0x16:0x10
    No-0:P0x00R0x17:0x10
    No-0:P0x00R0x18:0x04
    No-0:P0x00R0x19:0x20
    No-0:P0x00R0x1a:0x02
    No-0:P0x00R0x1b:0x08
    No-0:P0x00R0x1c:0x00
    No-0:P0x00R0x1d:0x00
    No-0:P0x00R0x1e:0x02
    No-0:P0x00R0x1f:0x40
    No-0:P0x00R0x20:0x00
    No-0:P0x00R0x21:0x22
    No-0:P0x00R0x22:0x41
    No-0:P0x00R0x23:0x41
    No-0:P0x00R0x24:0x41
    No-0:P0x00R0x25:0x41
    No-0:P0x00R0x26:0x00
    No-0:P0x00R0x27:0x00
    No-0:P0x00R0x28:0x00
    No-0:P0x00R0x29:0x00
    No-0:P0x00R0x2a:0x00
    No-0:P0x00R0x2b:0x45
    No-0:P0x00R0x2c:0x67
    No-0:P0x00R0x2d:0x00
    No-0:P0x00R0x2e:0x00
    No-0:P0x00R0x2f:0x00
    No-0:P0x00R0x30:0x00
    No-0:P0x00R0x31:0x00
    No-0:P0x00R0x32:0x00
    No-0:P0x00R0x33:0xff
    No-0:P0x00R0x34:0x00
    No-0:P0x00R0x35:0x00
    No-0:P0x00R0x36:0x00
    No-0:P0x00R0x37:0x00
    No-0:P0x00R0x38:0x00
    No-0:P0x00R0x39:0x00
    No-0:P0x00R0x3a:0x00
    No-0:P0x00R0x3b:0x00
    No-0:P0x00R0x3c:0x40
    No-0:P0x00R0x3d:0x00
    No-0:P0x00R0x3e:0xc9
    No-0:P0x00R0x3f:0x80
    No-0:P0x00R0x40:0x00
    No-0:P0x00R0x41:0x40
    No-0:P0x00R0x42:0x00
    No-0:P0x00R0x43:0xc9
    No-0:P0x00R0x44:0x80
    No-0:P0x00R0x45:0x00
    No-0:P0x00R0x46:0x40
    No-0:P0x00R0x47:0x00
    No-0:P0x00R0x48:0xc9
    No-0:P0x00R0x49:0x80
    No-0:P0x00R0x4a:0x00
    No-0:P0x00R0x4b:0x40
    No-0:P0x00R0x4c:0x00
    No-0:P0x00R0x4d:0xc9
    No-0:P0x00R0x4e:0x80
    No-0:P0x00R0x4f:0x00
    No-0:P0x00R0x50:0x00
    No-0:P0x00R0x51:0x00
    No-0:P0x00R0x52:0xc9
    No-0:P0x00R0x53:0x80
    No-0:P0x00R0x54:0x00
    No-0:P0x00R0x55:0x00
    No-0:P0x00R0x56:0x00
    No-0:P0x00R0x57:0xc9
    No-0:P0x00R0x58:0x80
    No-0:P0x00R0x59:0x00
    No-0:P0x00R0x5a:0x00
    No-0:P0x00R0x5b:0x00
    No-0:P0x00R0x5c:0xc9
    No-0:P0x00R0x5d:0x80
    No-0:P0x00R0x5e:0x00
    No-0:P0x00R0x5f:0x00
    No-0:P0x00R0x60:0x00
    No-0:P0x00R0x61:0xc9
    No-0:P0x00R0x62:0x80
    No-0:P0x00R0x63:0x00
    No-0:P0x00R0x64:0x00
    No-0:P0x00R0x65:0x00
    No-0:P0x00R0x66:0x00
    No-0:P0x00R0x67:0x00
    No-0:P0x00R0x68:0x00
    No-0:P0x00R0x69:0x00
    No-0:P0x00R0x6a:0x00
    No-0:P0x00R0x6b:0x01
    No-0:P0x00R0x6c:0x40
    No-0:P0x00R0x6d:0x7b
    No-0:P0x00R0x6e:0x00
    No-0:P0x00R0x6f:0x00
    No-0:P0x00R0x70:0xe7
    No-0:P0x00R0x71:0x00
    No-0:P0x00R0x72:0x00
    No-0:P0x00R0x73:0xff
    No-0:P0x00R0x74:0xff
    No-0:P0x00R0x75:0x60
    No-0:P0x00R0x76:0x00
    No-0:P0x00R0x77:0x80
    No-0:P0x00R0x78:0x00
    No-0:P0x00R0x79:0x00
    No-0:P0x00R0x7a:0xff
    No-0:P0x00R0x7b:0x00
    No-0:P0x00R0x7c:0xff
    No-0:P0x00R0x7d:0x8c
    No-0:P0x00R0x7e:0x7d
    No-0:P0x00R0x7f:0x00
    ======caught smartpa reg end ======

  • 0 in reply to Sam Wu
    TI__Mastermind 23020 points

    shall reply in a short time

  • 0 in reply to Sam Wu
    Prodigy 40 points

    BTW, our AVDD and IOVDD were external 1.8V

  • 0 in reply to Sam Wu
    TI__Mastermind 23020 points

    Sorry for the delay. I will be available to reply in a few hours

  • 0 in reply to Sanjay Dixit
    TI__Mastermind 23020 points

    3180_latest2.cfg

    Would you try changing the below in your i2c and see if it helps?

                                       0X98 0X22 0X40

                                        0X98 0X23 0X40

                                         0X98 0X24 0X40

                                         0X98 0X25  0X40

     I have also made a file from PPC3. Can you check if this gives an output.

    Please also send your schematic

  • +1 in reply to Sanjay Dixit
    Prodigy 40 points

    Does the R02 data should be 0x01 when wake up?
    Because our AVDD was 1.8V

    And I find it should short the AREG and AVDD as document:
    "if the AVDD voltage is less than 1.98 V in the system, then short the
    AREG and AVDD pins onboard and do not enable the internal AREG by keeping the AREG_SELECT bit to 1b'0
    (default value) of P0_R2."

    Then the PDMCLK will output 3.072MHZ signal.

  • 0 in reply to Sam Wu
    TI__Mastermind 23020 points

    Shall reply in a few hours

  • 0 in reply to Sanjay Dixit
    Prodigy 40 points

    I also find ASI_CFG1 Register (page = 0x00, address = 0x08)

    What value should we use for two PCMD3180 shared same SDOUT use case?

  • 0 in reply to Sam Wu
    TI__Mastermind 23020 points

    At the moment the TI website is not giving a response from my PC. I shall revert soon

  • +1 in reply to Sanjay Dixit
    TI__Mastermind 23020 points

    Page      0x00

    Address 0x08

    Data      0x00