TLV320ADC5140: Test Pattern

Hey Brian,

It sounds like you'll like an indicator to determine if your ADC is giving out data or not. I'll get back to you with a response in 48hrs.

Regards,

Ore 

Hi Ore,
Yes, and if it I am receiving it correctly.

With the BCLK edge/Polairty, Tx Offset and all the other options.  I'd like to know of a good way to verify the data being sent by the ADC is being received correctly as we are using a FPGA to talk to the ADC via the audio serial data interface in the TDM format.

The data doesn't look right based on feeding in a sine tone wave and I'm hoping the ADC can produce some sort of test pattern to make sure the FPGA is receiving data correctly.

Thank You,
Brian

Okay, I would get back to you with a way to indicate your ADC is producing data. Give me till next week to respond.

Thanks,

Ore.. 

Hey Brian, 

A good way to configure your ADC is to use PPC3. You can download it from ti.com by making a request here : https://www.ti.com/tool/PUREPATHCONSOLE

Regards,

Ore

Hi Ore,
Yes i have already downloaded that and it used it to set the registers.  But I have no way to verify that what the chip is sending the FPGA is receiving correctly without the a test pattern from the ADC or something of that nature.

Thank You,
Brian

Hey Brian,

Using the PPC3 is a good first step to setting your registers. There is no test pattern within the registers to verify the format of the DOUT. The best way to observe the format of your I2S bus is to use a monitoring device like an oscilloscope or logic analyzer, observing the FSYNC, BCK and SDOUT with respect to each other.

Regards,

Ore.