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TLV320AIC3206: PLL range low vs high

Part Number: TLV320AIC3206


Page 0 / Register 4 / bit D6 allows you to set the PLL range

0: Low PLL Clock Range
1: High PLL Clock Range

When should this bit be set to 1 instead of 0?

  • Hello Douglas,

    The TLV320AIC3206 offers a wide range of clock frequencies. Setting this bit allows the user to extend the high "1" or low "0" bounds at the edges of the PLL clock range. 

    As described in 2.7.1 PLL:

    I hope this helps.
    Best,
    Andrew