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TAS2560: Tas2560

Nadeeem Jamal
Prodigy 80 points
Part Number: TAS2560
Other Parts Discussed in Thread: CC1352P7,

Dear Sir,

We are trying to use the TAS2560 with the CC1352p7 using I2S. We finally got some sound by generating a tone using the below function :-
// Generates a sine wave at the specified frequency and sampling rate..


void generateSineWave(int16_t *buffer, int bufferLength, double frequency, double samplingRate)
{
for (int i = 0; i < bufferLength; i++)
{
double t = (double)i / samplingRate;
double value = sin(2.0 * M_PI * frequency * t);
buffer[i] = (int16_t)(value * 32767.0); // Convert to 16-bit PCM range (-32768 to 32767)
}
}

What we realize is no matter what we set the freq to, the tone is always the same. It seems like a muffled medium pitched loud sound. We are not sure what we are doing wrong. Furthermore what register can we use from i2c to control the volume?

Furthermore can you advise what kind of file is needed to play sound, how can i convert a mp3 file for i2s?

  i2sParams.samplingFrequency = 48khz;

These are our config regs:-

cfg_reg registers[] = {
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x07, 0x41 },
{ CFG_META_DELAY, 0x10 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x07, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x01, 0x01 },
{ CFG_META_DELAY, 0x10 },

{ 0x00, 0x00 },
{ 0x7f, 0x00 },
// Specify the clock (MCLK/BCLK)
{ 0x0f, 0x01 },
// PLL P
{ 0x0f, 0x01 },
// PLL J
{ 0x10, 0x20 },
// PLL D - MSB 6 bits
{ 0x11, 0x00 },
// PLL D - LSB 8 bits
{ 0x12, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x00 },
//decimation and interpolation
{ 0x0d, 0x08 },
{ 0x0e, 0x10 },
//clock error detection
{ 0x50, 0x31 },
{ 0x04, 0x5f },
{ 0x15, 0x02 },
{ 0x09, 0x83 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0xfd },
{ 0x36, 0xc0 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x08, 0x01 },
{ 0x36, 0x32 },
{ 0x22, 0x3f },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x49, 0x0c },
{ 0x3c, 0x33 },
{ 0x02, 0x02 },
{ 0x07, 0x41 },
{ CFG_META_DELAY, 0x10 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x28, 0x7f },
{ 0xfb, 0xb5 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x2c, 0x80 },
{ 0x04, 0x4c },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x30, 0x7f },
{ 0xf7, 0x6a },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x1c, 0x7f },
{ 0xff, 0xff },
{ 0xff, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x20, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x24, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x33 },
{ CFG_META_BURST, 4 },
{ 0x18, 0x06 },
{ 0x66, 0x66 },
{ 0x66, 0x00 },
{ 0x00, 0x34 },
{ CFG_META_BURST, 4 },
{ 0x34, 0x3a },
{ 0x46, 0x74 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x38, 0x22 },
{ 0xf3, 0x07 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x3c, 0x80 },
{ 0x77, 0x61 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x40, 0x22 },
{ 0xa7, 0xcc },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x44, 0x3a },
{ 0x0c, 0x93 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x33 },
{ CFG_META_BURST, 4 },
{ 0x10, 0x75 },
{ 0xc2, 0x8e },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x14, 0x6e },
{ 0x14, 0x79 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x20, 0x1e },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x24, 0x21 },
{ 0x3d, 0x71 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x28, 0x24 },
{ 0x7a, 0xe1 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x2c, 0x27 },
{ 0xb8, 0x52 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x30, 0x2a },
{ 0xf5, 0xc3 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x34, 0x2e },
{ 0x33, 0x33 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x38, 0x31 },
{ 0x70, 0xa4 },
{ 0x00, 0x00 },
{ CFG_META_BURST, 4 },
{ 0x3c, 0x34 },
{ 0xae, 0x14 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x3c, 0x3d },
{ 0x99, 0x9a },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x40, 0x30 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x44, 0x50 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x4c, 0x02 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x54, 0x00 },
{ 0x88, 0x40 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x58, 0x00 },
{ 0x06, 0xd3 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ CFG_META_BURST, 4 },
{ 0x60, 0x28 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x33 },
{ CFG_META_BURST, 4 },
{ 0x40, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x33 },
{ CFG_META_BURST, 4 },
{ 0x64, 0x39 },
{ 0x80, 0x00 },
{ 0x00, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x07, 0x40 },
};

  • 0
    TI__Mastermind 19265 points

    Hi Nadeeem,

    Can you test the 2560 device with a known working register set such as that in section 9.6.2 of the TAS2560 datasheet? 

    Regarding the volume control you can refer to this document,

    5444.Digital_Gain_Control.pdf

    It may also be good to share this question on the E2E forum for CC1352, I am not familiar with this device. 

    Regards,
    Arthur

  • 0 in reply to Arthur Brown
    Prodigy 80 points

    Dear Arthur,

    We were actually using the pure path console generated configurations registers. I am assuming this would be correct.

    This is what we have understood so far:-

    On CC1352P7 Side

    1) We have configured our I2S Interface to work default parameters and made a few changes:-

    * Defaults values are:
    * @code
    * params.samplingFrequency = 48000;
    * params.memorySlotLength = I2S_MEMORY_LENGTH_16BITS;
    * params.moduleRole = I2S_CONTROLLER;
    * params.trueI2sFormat = (bool)true;
    * params.invertWS = (bool)true;
    * params.isMSBFirst = (bool)true;
    * params.isDMAUnused = (bool)false;
    * params.samplingEdge = I2S_SAMPLING_EDGE_RISING;
    * params.beforeWordPadding = 0;
    * params.bitsPerWord = 16;
    * params.afterWordPadding = 0;
    * params.fixedBufferLength = 1;
    * params.SD0Use = I2S_SD0_OUTPUT;
    * params.SD1Use = I2S_SD1_INPUT;
    * params.SD0Channels = I2S_CHANNELS_STEREO;
    * params.SD1Channels = I2S_CHANNELS_STEREO;
    * params.phaseType = I2S_PHASE_TYPE_DUAL;
    * params.startUpDelay = 0;
    * params.CCLKDivider = 40;
    * params.readCallback = NULL;
    * params.writeCallback = NULL;
    * params.errorCallback = NULL;
    * params.custom = NULL;

    Based on this it seems the I2S Driver is generating a MCLK,WSCLK, SCK , when we measure BCLK we are getting a rate of 1.55 MHZ.  Base on my understanding the bellow settings are to configure the ASI format:-

    * params.SD0Channels = I2S_CHANNELS_STEREO;
    * params.phaseType = I2S_PHASE_TYPE_DUAL;

    This has configured the ASI to run on Dual channel , that means left and right channels and hence with a WSCLK indicating left or right channel. Based on this understanding the freq of 1.55mhz is calculated as follows :  48kh*16*2.  

    Now coming to TAS2560 Configurations

    48khz_bclk1536.c 
    //48khz bclk 1.536 mhz
cfg_reg registers[] = {
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x07, 0x41 },
{ CFG_META_DELAY, 0x10 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x07, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x01, 0x01 },
{ CFG_META_DELAY, 0x10 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
// Specify the clock (MCLK/BCLK)
{ 0x0f, 0x01 },
// PLL P
{ 0x0f, 0x01 },
// PLL J
{ 0x10, 0x20 },
// PLL D - MSB 6 bits
{ 0x11, 0x00 },
// PLL D - LSB 8 bits
{ 0x12, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x00 },
//decimation and interpolation
{ 0x0d, 0x08 },
{ 0x0e, 0x10 },
//clock error detection
{ 0x50, 0x31 },
{ 0x04, 0x5f },
{ 0x15, 0x02 },
{ 0x09, 0x83 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0xfd },
{ 0x36, 0xc6 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x08, 0x01 },
{ 0x36, 0x32 },
{ 0x22, 0x3f },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x49, 0x0c },
{ 0x3c, 0x33 },
{ 0x02, 0x02 },
{ 0x07, 0x41 },
{ CFG_META_DELAY, 0x10 },
{ 0x00, 0x32 },
{ 0x28, 0x7f },
{ 0x29, 0xfb },
{ 0x2a, 0xb5 },
{ 0x2b, 0x00 },
{ 0x2c, 0x80 },
{ 0x2d, 0x04 },
{ 0x2e, 0x4c },
{ 0x2f, 0x00 },
{ 0x30, 0x7f },
{ 0x31, 0xf7 },
{ 0x32, 0x6a },
{ 0x33, 0x00 },
{ 0x1c, 0x7f },
{ 0x1d, 0xff },
{ 0x1e, 0xff },
{ 0x1f, 0xff },
{ 0x20, 0x00 },
{ 0x21, 0x00 },
{ 0x22, 0x00 },
{ 0x23, 0x00 },
{ 0x24, 0x00 },
{ 0x25, 0x00 },
{ 0x26, 0x00 },
{ 0x27, 0x00 },
{ 0x00, 0x33 },
{ 0x18, 0x06 },
{ 0x19, 0x66 },
{ 0x1a, 0x66 },
{ 0x1b, 0x66 },
{ 0x00, 0x34 },
{ 0x34, 0x3a },
{ 0x35, 0x46 },
{ 0x36, 0x74 },
{ 0x37, 0x00 },
{ 0x38, 0x22 },
{ 0x39, 0xf3 },
{ 0x3a, 0x07 },
{ 0x3b, 0x00 },
{ 0x3c, 0x80 },
{ 0x3d, 0x77 },
{ 0x3e, 0x61 },
{ 0x3f, 0x00 },
{ 0x40, 0x22 },
{ 0x41, 0xa7 },
{ 0x42, 0xcc },
{ 0x43, 0x00 },
{ 0x44, 0x3a },
{ 0x45, 0x0c },
{ 0x46, 0x93 },
{ 0x47, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x33 },
{ 0x10, 0x75 },
{ 0x11, 0xc2 },
{ 0x12, 0x8e },
{ 0x13, 0x00 },
{ 0x14, 0x6e },
{ 0x15, 0x14 },
{ 0x16, 0x79 },
{ 0x17, 0x00 },
{ 0x20, 0x1e },
{ 0x21, 0x00 },
{ 0x22, 0x00 },
{ 0x23, 0x00 },
{ 0x24, 0x21 },
{ 0x25, 0x3d },
{ 0x26, 0x71 },
{ 0x27, 0x00 },
{ 0x28, 0x24 },
{ 0x29, 0x7a },
{ 0x2a, 0xe1 },
{ 0x2b, 0x00 },
{ 0x2c, 0x27 },
{ 0x2d, 0xb8 },
{ 0x2e, 0x52 },
{ 0x2f, 0x00 },
{ 0x30, 0x2a },
{ 0x31, 0xf5 },
{ 0x32, 0xc3 },
{ 0x33, 0x00 },
{ 0x34, 0x2e },
{ 0x35, 0x33 },
{ 0x36, 0x33 },
{ 0x37, 0x00 },
{ 0x38, 0x31 },
{ 0x39, 0x70 },
{ 0x3a, 0xa4 },
{ 0x3b, 0x00 },
{ 0x3c, 0x34 },
{ 0x3d, 0xae },
{ 0x3e, 0x14 },
{ 0x3f, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x3c, 0x3d },
{ 0x3d, 0x99 },
{ 0x3e, 0x9a },
{ 0x3f, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x40, 0x30 },
{ 0x41, 0x00 },
{ 0x42, 0x00 },
{ 0x43, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x44, 0x50 },
{ 0x45, 0x00 },
{ 0x46, 0x00 },
{ 0x47, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x4c, 0x02 },
{ 0x4d, 0x00 },
{ 0x4e, 0x00 },
{ 0x4f, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x54, 0x00 },
{ 0x55, 0x88 },
{ 0x56, 0x40 },
{ 0x57, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x58, 0x00 },
{ 0x59, 0x06 },
{ 0x5a, 0xd3 },
{ 0x5b, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x32 },
{ 0x60, 0x28 },
{ 0x61, 0x00 },
{ 0x62, 0x00 },
{ 0x63, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x33 },
{ 0x40, 0x00 },
{ 0x41, 0x00 },
{ 0x42, 0x00 },
{ 0x43, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x00, 0x33 },
{ 0x64, 0x39 },
{ 0x65, 0x80 },
{ 0x66, 0x00 },
{ 0x67, 0x00 },
{ 0x00, 0x00 },
{ 0x7f, 0x00 },
{ 0x07, 0x40 },
};

     

    I used the above register setting created by pure path console.  When I studying some of the registers related to clocks and ASI Format this is what I realised:-

    1)  ASI Mode Control Register 0x14  is set to 0x6E . It seems this is configuring the device to be asi length of 24 bits and ASI Mode of LJF. Our file format is actually suppose to be mono PCM of 16 bits and 8 KHZ.

    Hence I was thinking in order to meet my requirements,  I need to change the settings or Register 0x14 to 10000b =0x10. Which changes the settings to  16 bit and mono PCM.  IS THIS CORRECT

    2)ASI Channel register 0x15 is set to 0x14 .Which seems to be set to LEFT Channel,   I have decided to change this to 0x03 for monoPCM.

    3) as you can see the clock settings are set for BCLK as input:(Not changed base on Pure COnsole)-

    // Specify the clock (MCLK/BCLK)
    { 0x0f, 0x01 },   ///input blck and divider =1
    // PLL P
    { 0x0f, 0x01 },
    // PLL J
    { 0x10, 0x20 },
    // PLL D - MSB 6 bits
    { 0x11, 0x00 },
    // PLL D - LSB 8 bits
    { 0x12, 0x00 },
    { 0x00, 0x00 },
    { 0x7f, 0x00 },
    { 0x00, 0x00 },
    Register PCM_RATE 0x36 is set to 0x33 finally and we changed it to 0x02 for 48khz.

    all other registers were kept the same , based on pure console settings.

    Based on above , i need to send it a wave file with the following properties :--

    1) Sample rate 48khz

    2) 16 bit pcm signed integer

    Please can you confirm if the below file format is correct.

    CLOCKS

    Lastly based on Pure Generated output, is it correct for in terms of clocks: 

    As far as I have understood, the I2s Driver creates MCLK based on 48MHZ/Clock Divider ratio set in I2S Parameter's, however as our clock is above one mhz, we dont really need MCLK and can do with just BCLK. Currently when we checked the output freq of BCLK is around 1.55 mhz.

    in the clock formula , I didn't understand how PLL Clock works. For instand we can choose if we want to use the source as BCLK or MCLK. In our case it is configured to use BCLK as the input and source for PLL_CLKIN.

    Then according to data sheet you divide the PLL_CLKIN by the P value set in register 0x0f which is set to 1. But then I didnt understand how you use the J.D register values for the fractional multiplier?  What does it mean by J.D( are you multiplying J and D)  Sorry I am new to all this stuff.

    thanks for your help

  • 0 in reply to Nadeeem Jamal
    TI__Mastermind 19265 points

    Hi Nadeem, 

    I notice that you have a duplicate thread, and are currently getting support from Ivan, He is more experienced with these older devices. I would request that you consider his suggestions for your debug.

    Regards,
    Arthur