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TLV320AIC3104: The output Vpp of the pins LEFT_LOP and LEFT_LOM

Kungyeh Chen
Prodigy 90 points
Part Number: TLV320AIC3104


Hi,

The TLV320AIC3104 datasheet's 8.5 Electrical Characteristics includes the following data.

Is this referring to the specifications of pins LEFT_LOP and LEFT_LOM?

I have modified the register settings and measurements, resulting in LEFT_LOP and LEFT_LOM exceeding 4Vpp.

May I inquire about the maximum output Vpp of the pins LEFT_LOP and LEFT_LOM on the TLV320AIC3104IRHBR?

Thanks.

Kungyeh

  • 0
    TI__Mastermind 47585 points

    Hi Kungyeh,

    What changes did you make to the settings? The 4Vpp spec is only valid if you meet the conditions outlined in the spec. Is your line out set to differential mode? Is your volume control set to 0dB? Is the common mode = 1.35V?

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 90 points

    Hi ,

    Our application involves connecting the line out to an amplifier and then to a speaker, as shown in the diagram below:

    The audio signal can come from different sources, such as MIC/LINE IN/I2S, and can be configured with different gains. Therefore, in order to limit the maximum output of the speaker to 2W (8Vpp), we have determined that the maximum output for the Line out should be 4Vpp.

    Because the datasheet states that the AUDIO DAC Full-scale output voltage is 4Vpp, we initially assumed this to be the maximum output. However, it seems that this is not the case, as I can modify the register settings to make it exceed 4Vpp. Therefore, the voltage range of the Line out should be between 0 and 3.3V, resulting in a maximum output Vpp of 6.6V. Is this correct?

    Is your line out set to differential mode? <= Yes.
    Is your volume control set to 0dB? <= less than 0dB
    Is the common mode = 1.35V? <= Yes.

    Thanks.

    Kungyeh

  • +1 in reply to Kungyeh Chen
    TI__Mastermind 47585 points

    Hi Kungyeh,

    I'm not sure where you're getting the 0 and 3.3V number from. The output voltage of the DAC is dependent on the input signal given and the gain applied through out the audio chain. If you want to limit the output of the speaker, you need to set the gain of the codec such that a 0dBFS (from either the ADC or I2S source) does not exceed the 4Vpp limit you're looking for. This likely means that the gain of the ADC and DAC paths will need to be different. You can achieve this by adjusting the PGA gain and the DAC channel volume.

    Best regards,
    Jeff McPherson

  • 0 in reply to Jeff McPherson
    Prodigy 90 points

    Hi Jeff,

    Thank you for your response.

    Best regards,

    Kungyeh