Part Number: TLV320ADC3101
For I2S the DUTTLV320ADC3101 will generate with 1 bit offset, for the TDM, does it also transmit the I2S data protocol? Is there 1 bit offset for TDM?
And are left justified mode with time-slot-based mode enabled and DSP mode with time-slot-based mode enabled both called TDM?
Thanks.