Other Parts Discussed in Thread: TAS6424, TAS6424E-Q1
Dear, TI Support,
In TAS6424, (high power model), there is no requirement of having 2MCLK for FS when BCLK and MCLK are connected together.
However, in TAS6424L low power version, data sheet clearly stated the requirement of FS to be 2MCLK.
At the end of 9.3.1.4 in Datasheet, SLOS809 – MARCH 2017
" If SCLK and MCLK are connected together than FSYNC should be minimum 2 MCLK pulses long."
Furthermore, actually, it seems to be working fine 1MCLK for FS with TDM4 channel mode.
Is there any good reason for stating FS as 2MCLK condition?
Thank you.
Best regards,
CJ Lee
