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TLV320AIC3101: How to set the BCLK frequency when it work as master

Part Number: TLV320AIC3101

Hi team,

In datasheet of TLV320AIC3101, it describes that in master mode, BCLK can be generated with 32fs or 64fs. But I didn't find the register to configure BCLK. Could u pls help to explain how to get 32fs BCLK in master mode? Thanks!

Rayna

  • Hi,

    I believe you are referring to the statement below. This is master in continuous mode and it's giving an example with 16-bit or 32-bit data width.

    In continuous mode, only the minimal number of bit clocks needed to transfer the audio data are generated.

    You configured either continuous or 256-clock mode in register 9 below.

    Regards.