Other Parts Discussed in Thread: SRC4190
Hi guys,
Looking at the datasheet of SRC4190, it has Idd dynamic specified as 66mA for fsin = fsout = 192kHz. Does this change for different sample rates, eg 48kHz in, 96kHz out, etc?
Thanks
Alex
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Other Parts Discussed in Thread: SRC4190
Hi guys,
Looking at the datasheet of SRC4190, it has Idd dynamic specified as 66mA for fsin = fsout = 192kHz. Does this change for different sample rates, eg 48kHz in, 96kHz out, etc?
Thanks
Alex
Hi, Alex,
I looked around, and didn't immediately find this data.
What is your concern?
-d2
Hi Don,
My application is very unlikely to use 192kHz input or Output and I was wondering if the current draw reduced at lower sample rates, I have looked at other mftr SRCs and they have lower current at lower sample rates. I am calculating power budgets.
Alex
Will it help if I give a competitor's example which is tempting me away?
Analog Devices AD1895:
48kHz:48kHz - 20mA
96kHz:96kHz: - 26mA
192kHz:192kHz - 43mA
Hi Don,
I would have thought that kind of data would be on the datasheet, or fairly quickly to hand from the team who designed the IC.
Looking forward to the data anyway,
Alex