TLV320AIC3254-Q1: TLV320AIC3254-Q1 bringup issue

Dear Kevin

I add the clock to codec's node.

However, the aic32x4_i2c_probe can not be probe.

Do yo uhave any comment about it?

Thank you very much

&qupv3_se2_i2c {
	status = "okay";
	codec: tlv320aic32x4@18 {
		compatible = "ti,tlv320aic32x4";
		status = "okay";
		reg = <0x18>;
		iov-supply = <&codec_vreg>;
		ldoin-supply = <&codec_vreg>;
		reset-gpios = <&pmx75_gpios 01 GPIO_ACTIVE_LOW>;
		clock-names = "bclk";
		clocks = <&clock_audio_up 0>;
		aic32x4-gpio-func= <
			0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
			0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
			0x04 /* MFP3 AIC32X4_MFP3_GPIO_ENABLED */
			0xff /* AIC32X4_MFPX_DEFAULT_VALUE */
			0x08 /* MFP5 AIC32X4_MFP5_GPIO_INPUT */
		>;
	};
};

Is the logs same as last time ? Could you share the logs?

Thanks

Kevin

Dear Kevin, 

Yes, the log was same, the aic32x4_i2c_probe not be trigger

and platform vendor said that

"mclk is already enabled , you don't have to modified in codec drive"

It mean we does not need to add clocks at dtsi

no_sound_cards.txt

The issue is related to the clock setting in QCOM platform, we don't have that information, you can search the information from \arch\arm64\boot\dts\qcom\, there should be many reference for you.

If the device tree clock fails, you can only manually set the parent_rate and rate of the PLL

Thanks

Kevin

Dear Kevin

"only manually set the parent_rate and rate of the PLL"

==> do you mean that create and config  parent at codec driver?

May and How i initial a parent  at aic32x4_register_clocks()

Thank you very much

Can you try to add "mclk"&"bclk" in aic32x4_clkdesc_array[] ? 

static struct aic32x4_clkdesc aic32x4_clkdesc_array[] = {
	{
		.name = "pll",
		.parent_names =
			(const char* []) { "mclk", "bclk", "gpio", "din" },
		.num_parents = 4,
		.ops = &aic32x4_pll_ops,
		.reg = 0,
	},
	{
		.name = "codec_clkin",
		.parent_names =
			(const char *[]) { "mclk", "bclk", "gpio", "pll" },
		.num_parents = 4,
		.ops = &aic32x4_codec_clkin_ops,
		.reg = 0,
	},
	{
		.name = "ndac",
		.parent_names = (const char * []) { "codec_clkin" },
		.num_parents = 1,
		.ops = &aic32x4_div_ops,
		.reg = AIC32X4_NDAC,
	},
	{
		.name = "mdac",
		.parent_names = (const char * []) { "ndac" },
		.num_parents = 1,
		.ops = &aic32x4_div_ops,
		.reg = AIC32X4_MDAC,
	},
	{
		.name = "nadc",
		.parent_names = (const char * []) { "codec_clkin" },
		.num_parents = 1,
		.ops = &aic32x4_div_ops,
		.reg = AIC32X4_NADC,
	},
	{
		.name = "madc",
		.parent_names = (const char * []) { "nadc" },
		.num_parents = 1,
		.ops = &aic32x4_div_ops,
		.reg = AIC32X4_MADC,
	},
	{
		.name = "bdiv",
		.parent_names =
			(const char *[]) { "ndac", "mdac", "nadc", "madc" },
		.num_parents = 4,
		.ops = &aic32x4_bdiv_ops,
		.reg = AIC32X4_BCLKN,
	},
	{
		.name = "mclk",
	},
	{
		.name = "bclk",
	},
};

Hi Daniel,

Could you tell me any update from your side? 

Kevin

Dear Kevin

I have following register error after add this two clk at driver

I am debuging it

[    7.129443][   T41] tlv320aic32x4 2-0018: aic32x4_register_clk, devname(2-0018) name(mclk)
[    7.137943][   T41] tlv320aic32x4 2-0018: aic32x4_register_clk, clk_hw_register_clkdev ret(0)
[    7.146735][   T41] ------------[ cut here ]------------
[    7.152193][   T41] WARNING: CPU: 3 PID: 41 at drivers/clk/clk.c:3960 __clk_register+0x428/0x45c
[    7.161210][   T41] Modules linked in:
[    7.165062][   T41] CPU: 3 PID: 41 Comm: kworker/u8:1 Not tainted 5.15.104-debug-g7df3898d1b46-dirty #1
[    7.174694][   T41] Hardware name: Qualcomm Technologies, Inc. SA522 IDP Overlay (DT)
[    7.182725][   T41] Workqueue: events_unbound deferred_probe_work_func
[    7.189434][   T41] pstate: 80400005 (Nzcv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    7.197291][   T41] pc : __clk_register+0x428/0x45c
[    7.202302][   T41] lr : __clk_register+0x60/0x45c
[    7.207220][   T41] sp : ffffffc0082637d0
[    7.211338][   T41] x29: ffffffc0082637f0 x28: ffffffdabc3de4f0 x27: ffffffc008263898
[    7.219374][   T41] x26: ffffffc008263880 x25: 0000000000000118 x24: ffffff8005f62280
[    7.227409][   T41] x23: ffffffc008263880 x22: ffffff8005cf6820 x21: 00000000ffffffea
[    7.235444][   T41] x20: ffffff8005f62280 x19: ffffff8005f62000 x18: 00000000120a403e
[    7.243479][   T41] x17: 646b6c635f726574 x16: ffffffffffffffff x15: 0000000000000004
[    7.251514][   T41] x14: ffffffdabc288e28 x13: ffffffa582a9c000 x12: ffffffdabc22cf90
[    7.259550][   T41] x11: 0000000000000001 x10: 0000000000000100 x9 : f03e1d37b26ce900
[    7.267585][   T41] x8 : 0000000000000000 x7 : 0000000000000000 x6 : 000000000000003f
[    7.275620][   T41] x5 : 0000000000000040 x4 : 0000000000000100 x3 : 0000000000000001
[    7.283655][   T41] x2 : 0000000000000dc0 x1 : 0000000000000cc0 x0 : ffffffdabc06ecf5
[    7.291692][   T41] Call trace:
[    7.294915][   T41]  __clk_register+0x428/0x45c
[    7.299564][   T41]  devm_clk_register+0x78/0xb8
[    7.304306][   T41]  aic32x4_register_clocks+0x180/0x1c4
[    7.309767][   T41]  aic32x4_probe+0x19c/0x270
[    7.314332][   T41]  aic32x4_i2c_probe+0x104/0x138
[    7.319250][   T41]  i2c_device_probe+0x204/0x2d0
[    7.324089][   T41]  call_driver_probe+0x38/0x110
[    7.328924][   T41]  really_probe+0xc4/0x34c
[    7.333312][   T41]  __driver_probe_device+0x114/0x17c
[    7.338583][   T41]  driver_probe_device+0x48/0x1a0
[    7.343594][   T41]  __device_attach_driver+0x12c/0x1d0
[    7.348959][   T41]  bus_for_each_drv+0x84/0xd0
[    7.353608][   T41]  __device_attach+0xd0/0x1c4
[    7.358256][   T41]  device_initial_probe+0x14/0x20
[    7.363267][   T41]  bus_probe_device+0x34/0x98
[    7.367915][   T41]  deferred_probe_work_func+0xac/0x108
[    7.373373][   T41]  process_one_work+0x1a8/0x3a0
[    7.378211][   T41]  worker_thread+0x2d8/0x490
[    7.382776][   T41]  kthread+0x154/0x218
[    7.386803][   T41]  ret_from_fork+0x10/0x20
[    7.391194][   T41] ---[ end trace f65ba6d7087d7f9c ]---

Hi Daniel,

Seems like a null pointer is called, you must add something.

	{
		.name = "mclk",
		.parent_names = (const char *[]) {},
		.num_parents = 0,
		.ops = NULL,
		.reg = 0,
	},
	{
		.name = "bclk",
		.parent_names = (const char *[]) {},
		.num_parents = 0,
		.ops = NULL,
		.reg = 0,
	},

If needed, we can have a debug seesion.

Kevin

OK~i am building, please wait 10 mins