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TAS2505: Problem getting WCLK and BCLK as output working

Michel Blom
Prodigy 10 points
Part Number: TAS2505


Hi,

I'm trying to get the TAS2505 working. 

The I2C is working (read/write), i've changed the default script a bit to have WCLK and BCLK as output but i do not see any output on these ports.

I've redirected the CLKOUT to the GPIO  and i see the expected output on the scope.

I've checked if all the register had indeed the expected values and they did.

Script:


// MCLK = 12Mhz
// DAC fs=43.8KHz
// bit 2 x 16
// P 1 ok
// R 1 ok
// J 7 ok
// D 0 ok

I2C1_Write1ByteRegister(0x18,0,0);
// Assert Software reset (P0, R1, D0=1)
I2C1_Write1ByteRegister(0x18,1,1);
//# Page Switch to Page 1
I2C1_Write1ByteRegister(0x18,0,1);
//# LDO output programmed as 1.8V and Level shifters powered up. (P1, R2, D5-D4=00, D3=0)
I2C1_Write1ByteRegister(0x18,2,0);
//# Page switch to Page 0
I2C1_Write1ByteRegister(0x18,0,0);
//# PLL_clkin = MCLK, codec_clkin = PLL_CLK, MCLK should be 12 MHz (P0, R4, D1-D0=03)
I2C1_Write1ByteRegister(0x18,4,3);
//# Power up PLL, set P=1, R=1, (Page-0, Reg-5)
I2C1_Write1ByteRegister(0x18,0x05,0b10010001); // 0x91
//# Set J=7, (Page-0, Reg-6)
I2C1_Write1ByteRegister(0x18,0x06,0b00000111); //0x04 j=7
//# D = 0000, D(13:8) = 0, (Page-0, Reg-7)
I2C1_Write1ByteRegister(0x18,0x07,0x00);
//# D(7:0) = 0, (Page-0, Reg-8)
I2C1_Write1ByteRegister(0x18,0x08,0x00);

//# add delay of 15 ms for PLL to lock
wait_15ms();
/*
NDAC 5 ok
MDAC 3 ok
DOSR 128 ok
*/
// DAC NDAC = 5
I2C1_Write1ByteRegister(0x18,0x0B,0b10000101); //0x85

//# DAC MDAC Powered up, MDAC=3 (P0, R12, D7=1, D6-D0=0000011)
I2C1_Write1ByteRegister(0x18,0x0C,0x83);

//# DAC OSR(9:0)-> DOSR=128 (P0, R12, D1-D0=00)
I2C1_Write1ByteRegister(0x18,0x0D,0x00);

// DAC OSR(9:0)-> DOSR=128 (P0, R13, D7-D0=10000000)
I2C1_Write1ByteRegister(0x18,0x0E,0x80);

// CLKOUT M powered up M=10
I2C1_Write1ByteRegister(0x18,0x1A,0b10001010);
// GPIO/DOUT GPIO output is CLKOUT
I2C1_Write1ByteRegister(0x18,0x34,0b00010000);

// Codec Interface control Word length = 16bits, BCLK&WCLK outputs, I2S mode. (P0, R27, D7-D6=00, D5-D4=00, D3-D2=11)
//I2C1_Write1ByteRegister(0x18,0x1B,0x00);
I2C1_Write1ByteRegister(0x18,0x1B,0b01100);// 0x0C

// Data slot offset 00 (P0, R28, D7-D0=0000)
I2C1_Write1ByteRegister(0x18,0x1C,0x00);
// Dac Instruction programming PRB #2 for Mono routing. Type interpolation (x8) and 3 programmable Biquads. (P0, R60, D4-D0=0010)
I2C1_Write1ByteRegister(0x18,0x3C,0x02);
// Page switch to Page 0
I2C1_Write1ByteRegister(0x18,0x00,0x00);
// DAC powered up, Soft step 1 per Fs. (P0, R63, D7=1, D5-D4=01, D3-D2=00, D1-D0=00)
I2C1_Write1ByteRegister(0x18,0x3F,0x90);

// DAC digital gain 0dB (P0, R65, D7-D0=00000000)
I2C1_Write1ByteRegister(0x18,0x41,0x00);
// DAC volume not muted. (P0, R64, D3=0, D2=1)
I2C1_Write1ByteRegister(0x18,0x40,0x04);
// Page Switch to Page 1
I2C1_Write1ByteRegister(0x18,0x00,0x01);

// Master Reference Powered on (P1, R1, D4=1)
I2C1_Write1ByteRegister(0x18,0x01,0x10);
// Output common mode for DAC set to 0.9V (default) (P1, R10)
I2C1_Write1ByteRegister(0x18,0x0A,0x00);
// Mixer P output is connected to HP Out Mixer (P1, R12, D2=1)
I2C1_Write1ByteRegister(0x18,0x0C,0x04);
// HP Volume, 0dB Gain (P1, R22, D6-D0=0000000)
I2C1_Write1ByteRegister(0x18,0x16,0x00);
// No need to enable Mixer M and Mixer P, AINL Volume, 0dB Gain (P1, R24, D7=1, D6-D0=0000000)
I2C1_Write1ByteRegister(0x18,0x18,0x00);
// Power up HP (P1, R9, D5=1)
I2C1_Write1ByteRegister(0x18,0x09,0x20);
// Unmute HP with 0dB gain (P1, R16, D4=1)
I2C1_Write1ByteRegister(0x18,0x10,0x00);
// SPK attn. Gain =0dB (P1, R46, D6-D0=000000)
I2C1_Write1ByteRegister(0x18,0x2E,0x00);
// SPK driver Gain=6.0dB (P1, R48, D6-D4=001)
I2C1_Write1ByteRegister(0x18,0x30,0x10);
// SPK powered up (P1, R45, D1=1)
I2C1_Write1ByteRegister(0x18,0x2D,0x02);

Any help would be appreciated.

Michel Blom

  • 0
    TI__Guru** 110475 points

    Hi Michel,

    I'll check your register settings and come back with further comments within the next couple of days.

    Best regards,
    -Ivan Salazar
    Applications Engineer

  • 0 in reply to Ivan Salazar
    TI__Guru** 110475 points

    Hi Michel,

    Just to isolate the clock side of things, can you please try with the attached script, you'd have to parse it into the format your using, the syntax is:

    • w means write command
    • 30 means device address 0x30 (8-bit with 0 on LSB)
    • 2nd pair of digits is the register address in hex value
    • last pair of digits is the value to write into the register, also in hex value

    w 30 00 00
w 30 01 01
w 30 00 01
w 30 02 00
w 30 01 10
w 30 00 00
w 30 04 03
w 30 05 91
w 30 06 07
w 30 07 00
w 30 08 50

w 30 0b 83
w 30 0c 85
w 30 0d 00
w 30 0e 80

w 30 19 03
w 30 1a 8a
w 30 34 10

w 30 1e 94
w 30 1b 0c

    This should configure the device to output 43.8kHz on WCLK and 1.4016MHz on BCLK. GPIO will output 8.4MHz in this case.
    Main difference from your script is that I include a command for reg 0x1e on page 0 to enable BCLK N Divider and set it for the correspondent value. Also adding the D fractional value for exact 43.8kHz FS.

    Best regards,
    -Ivan Salazar
    Applications Engineer

  • 0 in reply to Ivan Salazar
    Prodigy 10 points

    Hi Ivan,

    Changed the code accordingly and i see a nice BCLK and WCLK.

    I will look further into the differences.  Changing the reg 0x1e value alone did not do the job

    Many thanks,

    Michel

  • 0 in reply to Michel Blom
    TI__Guru** 110475 points

    Hi Michel,

    Good to hear the provided clock settings are working OK.
    You may also check if the sequence of commands.

    Best regards,
    -Ivan Salazar
    Applications Engineer