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TLV320ADC6140: Using non-standard audio rates and identifying a complementary DAC

Jacob Miller
Prodigy 20 points
Part Number: TLV320ADC6140
Other Parts Discussed in Thread: AM5728, , PCM5122, ADS8361, TAD5212, TAC5212, TAA5212

Tool/software:

For my application, I am using an AM5728 running Linux and want 2+ch audio at 16 bits in and out at a non-standard rate of, for example, 240kHz. I also want to use TDM/DSP mode over McASP for ease of integration into Linux. I'm not interested in using any of the extra features like programmable filters or AGC, I just need samples in and out. These will be driven by an external reference with one converter operating in Master mode.

My questions are,

  1. Does the TLV320ADC6140 support non-standard rates? For example if I supply and external clock of 15.36MHz (or 30.72MHz) could I configure the device produce 2*16bit streams at 240k in either Master or Slave mode?
    1. I'm aware of the 80kHz signal bandwidth limitation.
    2. I've requested PurePath 3 and perhaps my answer is in there based on section 8.3.2 of SBAS992A
  2. The same as #1 but using a PCM5122 DAC. Documentation for this device seems to indicates this is completely possible.

If this is not possible with both, are there active production TI offerings that I can use that both support TDM/DSP mode? I've located precision ADCs like the ADS8361 that support TDM, but no DACs.

My goal is to have a 2-channel ADC/DAC pair, either as an integrated CODEC or separate IC's, that can operate with TDM/DSP at non-standard audio rates near 240kHz with 16+bits and are configurable over I2C. I have the option to use a single or separate McASP ports, so a CODEC or separate IC's are both options.

Thanks in advance,

Jacob

  • 0
    TI__Expert 6305 points

    Allow 48hrs for a response.

    Regards.

  • 0 in reply to Ore Ogundana
    Prodigy 20 points

    Thank you, patiently standing by.

  • +1 in reply to Jacob Miller
    TI__Expert 6305 points

    Hey Jacob, 

    Thanks for being patient. Use this formula as a ROT when operating your ADC and DAC clocks, BCLK= #CH* sampling freq* #bits/CH. Depending on your values, it must not be bigger than the max BCLK frequency of the DS and your values multiply to be less than the BCLK max meaning your set up should work in either slave or master mode. The on-chip PLL is a clock driver that automatically delivers the clock rates and ratios needed depending on your input clock.  

    If you are interested in a replacement, Audio TI offers a range of suitable options to match your application: 

    • TAD5212 - Stereo DAC
    • TAC5212 - Stereo CODEC
    • TAA5212 - Stereo ADC

    They all operate with i2c using PPC3 and have available evms: https://www.ti.com/lit/ug/slau902a/slau902a.pdf?ts=1717698871289&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FTAC5212EVM-K.  

    Regards,

    Ore.

       

  • +1 in reply to Jacob Miller
    TI__Expert 6305 points

    Hey Jacob, 

    More information regarding the non-audio clock rate. 

    For the PCM512x clock tree in figure 63, a non-audio clock rate cannot be directly brought into the SCK to the PLL in master mode. The PLL source must be configured to be a GPIO pin, and that output brought back into another GPIO pin to support non-audio clock rates. Refer to figure 65 of PCM512x DS for the clock tree. 

    Regarding ADC6140, non-audio clock rates can also be supported using the clock tree calculator that is easily accessible on the device GUI, PPC3. Once auto-clock is disabled, the dividers and multipliers are a lot easier to manipulate. 

    Using the PPC3 GUI, this is what the clock tree would look like: 

    Regards,

    Ore. 

  • 0 in reply to Ore Ogundana
    Prodigy 20 points

    Thanks for the reply. That confirms my my own research. I've finally been able to test my EVM's with an alternate clock source to confirm as well. I had looked at the TAC5212 as a better match for my design than the separate devices I selected, but was unsure of it's availability and also didn't want to put it into the design given its preproduction status might mean design changes. Can you speak to when it'll enter Active status, or if at least it's TDM interface and supported rates won't change? I would prefer to use it. I'm basically unfamiliar with what could change between preproduction and active status.

  • +1 in reply to Jacob Miller
    TI__Expert 6305 points

    Hey Jacob, 

    Expect the TAC5212 official release after summer. Particularly end of September. The current user's guide is an excellent resource for operating the TAC5212EVM, coupled with the DS. If you make a request for the EVM, we could support you through using this device in your design.   

    I have used it myself and it has many flexible features.

    Regards,

    Ore.