Dear Technical Support,
I'm trying to set up the codec as follows
I2S Slave mode, MCLK = 3.072 MHZ, BCLK = 3.072 MHz, in I2S Mode, 1V RMS p-p input on left channel single ended The goal is to have the signal converted to I2s and appear on the I2S data line from the codec. The I2S clock, and MCLK are running shortly after power up.
Here is the setup in evm format
w 30 0 0 # set page 0
w 30 01 0 # reset codec
w 30 07 0 # 48k rate
w 30 65 0 # use pll clock
w 30 03 91 80 00 00 # set up pll
w 30 0B 01 # set up PLL
w 30 09 30 # 32-bit I2s mode
30 0f 0 # unmute left channel PGA gain = 0 dB
30 13 04 # powerup ADC
The left channel has output on the I2S bus, but the data is not correct. The two MSB bits are zero and the amplitude does not change if I change the signal generator input. Is there a step that I am missing?
Thank you very much.
Jeffrey Cohen
