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TAS5805M: About the startup sequence

Ryu Yamashita
Expert 2090 points
Part Number: TAS5805M

Tool/software:

Hi team,

Page 46 of the datasheet describes the startup sequence.
The I2C clock input starts 5ms after PDN is set high, but there is no guarantee that the clock can be input in Stable from the beginning of the clock when the clock is supplied from Soc.
In step 4, it says Once I2S clocks are stable,~ so I can interpret this as "there can be a period of time when the clock is unstable", is this correct?
Periods when the clocks are unstable = "Periods when the amplitude and frequency of the clocks are not stable.

Regards,
Ryu.

  • +1
    TI__Intellectual 1800 points

    Hi Ryu,

    You are correct. I2S clocks must be ready before I2C control is hard requirement. You can monitor the status of the I2S clocks by reading bit 2 of 0x71 register to make sure there is no clock error, and you can find more detailed information at 0x39 register. Thanks.

    Regards,

    Sam

  • 0 in reply to Sam Yang
    Expert 2090 points

    Hi Sam,

    Thanks for the reply.
    Is it ok if the I2S clock is unstable until I2C starts?
    I interpreted that it is good if the I2S clock is stable at the timing when I2C starts.

    Regards,
    Ryu.

  • +1 in reply to Ryu Yamashita
    TI__Intellectual 1800 points

    Hi Ryu,

    Can you please clarify what you mean by "unstable"? Before I2S clock is applied, please only configure the Page 0 registers; after I2S clock become valid, you can configure other registers including DSP coefficients. During the I2C initialization, I2S clocks are needed to be stable and valid. Thus, your second statement is correct. If the I2S clock is stable at the time the I2C starts, the device will operate as intended with no issue. Thanks.

    Regards,

    Sam

  • 0 in reply to Sam Yang
    Expert 2090 points

    Hi Sam,

    Thanks for the reply.
    I meant unstable as in distorted or unstable frequency.
    You have solved what I wanted to know.
    Thank you.

    Regards,
    Ryu.