TAS5825M: No audio output was heard from the chip if using an input sample rate of 96KHz

Hi Welson,

This depends on what configuration you have done before. If you have the auto detect for the input sample rate (found in register 0x28), then the device should automatically adjust when the sample rate is changed to supported frequencies. You can also check the fault registers (0x70 to 0x73) and the clock detection registers (0x37-0x39) to get some insight on why there is no audio. If you could send me what process flow you are using, register dumps and I2S signal screenshots of the device at 48kHz and 96kHz I am happy to help debug.

Regards,

Ramsey

Hi Ramsey

,

I dumped register from chip you need as below, and I have also checked the waveform which seem like normal.

 

SIG_CH_CTRL 0x28:0

FS_MON 0x37:b

BCK_SCLK_MON 0x38:40

CLKDET_STATUS 0x39:8

CHAN_FAULT 0x70:0

 

Thanks

Welson

Hi Welson,

Did you get a chance to get registers 0x71 - 0x73 as well? And what process flow are you using?

The device as shown seems to be detecting the change in sample rate correctly. You can make sure the device is in play mode by looking at register 0x03 as well. If you have an EVM on hand, you can use the GUI to assist with reading register values in real time.

Regards,

Ramsey

Hi Ramsey,

While running in real-time operation mode, I extracted the register dump from the chip you need. We don't have an EVM board and are using our speaker board, which produces sound when running at a 48 kHz sample rate.

VOLUME_CTRL 0x03:3

SIG_CH_CTRL 0x28:0
0x37:b
BCK_SCLK_MON 0x38:40
CLKDET_STATUS 0x39:8
CHAN_FAULT 0x70:0
SAP_CTRL1 0x33:2
GLOBAL_FAULT1 0x71:0
GLOBAL_FAULT2 0x72:0
WARNING 0x73:0

Thanks

Welson

Hramsey,

I worte a loop to catch the register's value as below

0x0:0

0x1:0

0x2:0

0x3:3

0x4:0

0x5:0

0x6:0

0x7:0

0x8:0

0x9:0

0xa:0

0xb:0

0xc:0

0xd:0

0xe:0

0xf:0

0x10:1

0x11:0

0x12:0

0x13:0

0x14:1

0x15:0

0x16:0

0x17:0

0x18:0

0x19:0

0x1a:0

0x1b:0

0x1c:0

0x1d:0

0x1e:0

0x1f:0

0x20:1

0x21:7

0x22:9

0x23:1

0x24:0

0x25:40

0x26:2

0x27:0

0x28:5b

0x29:0

0x2a:0

0x2b:0

0x2c:0

0x2d:0

0x2e:0

0x2f:0

0x30:1

0x31:0

0x32:0

0x33:2

0x34:0

0x35:11

0x36:0

0x37:b

0x38:40

0x39:8

0x3a:f9

0x3b:4

0x3c:0

0x3d:20

0x3e:80

0x3f:0

0x40:1

0x41:ff

0x42:40

0x43:0

0x44:0

0x45:0

0x46:1

0x47:0

0x48:0

0x49:0

0x4a:0

0x4b:0

0x4c:0

0x4d:30

0x4e:33

0x4f:30

0x50:7

0x51:0

0x52:0

0x53:0

0x54:0

0x55:0

0x56:0

0x57:3

0x58:0

0x59:0

0x5a:0

0x5b:0

0x5c:0

0x5d:f8

0x5e:cb

0x5f:0

0x60:7

0x61:b

0x62:3

0x63:9

0x64:0

0x65:7

0x66:0

0x67:95

0x68:2

0x69:0

0x6a:0

0x6b:3

0x6c:7

0x6d:a0

0x6e:11

0x6f:24

0x70:0

0x71:0

0x72:0

0x73:0

0x74:0

0x75:f8

0x76:0

0x77:0

0x78:0

0x79:0

0x7a:9

0x7b:3

0x7c:0

0x7d:0

0x7e:4b

0x7f:0

Thanks

Welson

Hi Welson,

From register 0x68, it looks like the device is still in sleep mode. I also noticed that register 0x28 is not 0x00. Can you try and write 00 to register 0x28 on startup? If that does not fix it I have attached a generic boot script for the device. Can you try and run the script and see if 98kHz works?

TAS5825M-test.cfg

Regards,

Ramsey

Hi Ramsey,

Thanks for the information.

We compared two files of the register running on 48K and 96K sample rate inputs. We found that only three registers were different.

The 0x28 register, originally set to 0x00, was changed to 0x5b as an experiment (running at 64Fs and 96K).

When the sample rate was 48K:

• 0x37 = 0x09
• 0x5e = 0xca
• 0x68 = 0x03

When the sample rate was 96K:

• 0x37 = 0x0b
• 0x5e = 0xcb
• 0x68 = 0x02

Do you know why register 0x68 automatically changed to 0x02 (Hiz)?

Thanks,

Welson

Hi Ramsy,

I can't download your folder, can you change file's format to RAR.

Thanks

Welson 

48K log: (Note: 0x71 sometimes receives 0x04, but under same conditions, 48K may produce sound while the 96K remains silent.)

0x0:0

0x1:0

0x2:0

0x3:3

0x4:0

0x5:0

0x6:0

0x7:0

0x8:0

0x9:0

0xa:0

0xb:0

0xc:0

0xd:0

0xe:0

0xf:0

0x10:1

0x11:0

0x12:0

0x13:0

0x14:1

0x15:0

0x16:0

0x17:0

0x18:0

0x19:0

0x1a:0

0x1b:0

0x1c:0

0x1d:0

0x1e:0

0x1f:0

0x20:1

0x21:7

0x22:9

0x23:1

0x24:0

0x25:40

0x26:2

0x27:0

0x28:0

0x29:0

0x2a:0

0x2b:0

0x2c:0

0x2d:0

0x2e:0

0x2f:0

0x30:1

0x31:0

0x32:0

0x33:2

0x34:0

0x35:11

0x36:0

0x37:9

0x38:40

0x39:8

0x3a:f9

0x3b:4

0x3c:0

0x3d:20

0x3e:80

0x3f:0

0x40:1

0x41:ff

0x42:40

0x43:0

0x44:0

0x45:0

0x46:1

0x47:0

0x48:0

0x49:0

0x4a:0

0x4b:0

0x4c:37

0x4d:30

0x4e:33

0x4f:30

0x50:7

0x51:0

0x52:0

0x53:0

0x54:0

0x55:0

0x56:0

0x57:3

0x58:0

0x59:0

0x5a:0

0x5b:0

0x5c:0

0x5d:f8

0x5e:ca

0x5f:0

0x60:7

0x61:b

0x62:3

0x63:9

0x64:0

0x65:7

0x66:0

0x67:95

0x68:3

0x69:0

0x6a:0

0x6b:3

0x6c:7

0x6d:a0

0x6e:11

0x6f:24

0x70:0

0x71:4

0x72:0

0x73:0

0x74:0

0x75:f8

0x76:0

0x77:0

0x78:0

0x79:0

0x7a:9

0x7b:3

0x7c:0

0x7d:0

0x7e:d1

0x7f:0

///////////////////////////////////////////////////

96K log:

0x0:0

0x1:0

0x2:0

0x3:3

0x4:0

0x5:0

0x6:0

0x7:0

0x8:0

0x9:0

0xa:0

0xb:0

0xc:0

0xd:0

0xe:0

0xf:0

0x10:1

0x11:0

0x12:0

0x13:0

0x14:1

0x15:0

0x16:0

0x17:0

0x18:0

0x19:0

0x1a:0

0x1b:0

0x1c:0

0x1d:0

0x1e:0

0x1f:0

0x20:1

0x21:7

0x22:9

0x23:1

0x24:0

0x25:40

0x26:2

0x27:0

0x28:0

0x29:0

0x2a:0

0x2b:0

0x2c:0

0x2d:0

0x2e:0

0x2f:0

0x30:1

0x31:0

0x32:0

0x33:2

0x34:0

0x35:11

0x36:0

0x37:9

0x38:40

0x39:8

0x3a:f9

0x3b:4

0x3c:0

0x3d:20

0x3e:80

0x3f:0

0x40:1

0x41:ff

0x42:40

0x43:0

0x44:0

0x45:0

0x46:1

0x47:0

0x48:0

0x49:0

0x4a:0

0x4b:0

0x4c:37

0x4d:30

0x4e:33

0x4f:30

0x50:7

0x51:0

0x52:0

0x53:0

0x54:0

0x55:0

0x56:0

0x57:3

0x58:0

0x59:0

0x5a:0

0x5b:0

0x5c:0

0x5d:f8

0x5e:ca

0x5f:0

0x60:7

0x61:b

0x62:3

0x63:9

0x64:0

0x65:7

0x66:0

0x67:95

0x68:3

0x69:0

0x6a:0

0x6b:3

0x6c:7

0x6d:a0

0x6e:11

0x6f:24

0x70:0

0x71:4

0x72:0

0x73:0

0x74:0

0x75:f8

0x76:0

0x77:0

0x78:0

0x79:0

0x7a:9

0x7b:3

0x7c:0

0x7d:0

0x7e:d1

0x7f:01

Thanks

Welson 

Hi Welson,

When you manually select the sample rate, it could be that there was a moment where the sample rate was not being given to the device or was changed causing a fault. This would put the outputs into a Hi-Z state.

The .cfg file can be opened with a text editor. If you select open with and use notepad you should be able to view it.

Regards,

Ramsey

Hi Ramsey,

"Even after setting register 0x28 to 0x00 for automatic sample rate detection, the problem remains. I can now access and view the data, but the root cause eludes me. Do you have any ideas?

There are three questions that need verification:

1. In a 96kHz situation, is using MCLK necessary?
2. Why can't I find information about registers 0x00, 0x7E, and 0x7F in the datasheet?

Thanks

Welson 

Hi Ramsey,

Thank you for your help. We have already identified a sound in the device, but we're still unclear about the functions of some registers. The datasheet doesn't explicitly list their values (like 0x00, 0x7F, 0x7D, 0x7E). Could you please explain these registers? Additionally, I noticed the #Tuning coeffs function in your configuration files. Do we need to set all of these coefficients in the device?

buf[0]=0x00; //
AMPIIC_Reg_Write(0x00,buf,1);
buf[0]=0x00; //
AMPIIC_Reg_Write(0x7f,buf,1);
buf[0]=0x02; //
AMPIIC_Reg_Write(0x03,buf,1);
buf[0]=0x11; //
AMPIIC_Reg_Write(0x01,buf,1);
buf[0]=0x11; //
AMPIIC_Reg_Write(0x7d,buf,1);
buf[0]=0xff; //
AMPIIC_Reg_Write(0x7e,buf,1);
buf[0]=0x01; //
AMPIIC_Reg_Write(0x00,buf,1);
buf[0]=0x05; //
AMPIIC_Reg_Write(0x51,buf,1);
buf[0]=0x02; //
AMPIIC_Reg_Write(0x00,buf,1);
buf[0]=0x00; //
AMPIIC_Reg_Write(0x1d,buf,1);
buf[0]=0x80; //
AMPIIC_Reg_Write(0x19,buf,1);
buf[0]=0x00; //
AMPIIC_Reg_Write(0x00,buf,1);
buf[0]=0x11; //
AMPIIC_Reg_Write(0x46,buf,1);
buf[0]=0x00;
AMPIIC_Reg_Write(0x02,buf,1);
buf[0]=0x01; //
AMPIIC_Reg_Write(0x53,buf,1);
buf[0]=0x00; //
AMPIIC_Reg_Write(0x54,buf,1);
buf[0]=0x02; //
AMPIIC_Reg_Write(0x03,buf,1);

buf[0]=0x00; //
AMPIIC_Reg_Write(0x00,buf,1);
buf[0]=0x00;
AMPIIC_Reg_Write(0x7f,buf,1);
buf[0]=0x00;
AMPIIC_Reg_Write(0x30,buf,1);
Delay1ms(50); //5ms waiting for reset finished.
buf[0]=0x02;
AMPIIC_Reg_Write(0x60,buf,1);
buf[0]=0x09;
AMPIIC_Reg_Write(0x62,buf,1);
buf[0]=0x30;
AMPIIC_Reg_Write(0x4c,buf,1);
buf[0]=0x03;
AMPIIC_Reg_Write(0x03,buf,1);
buf[0]=0x80;
AMPIIC_Reg_Write(0x78,buf,1);

Thanks

Welson 

Hi Raysey,

We found that some hidden registers need to be set to 0x7D and 0x7E. Just note that the device will have no output in 96 sample rate input if you do not set these registers.It should be updated those information in the datasheet.

Thanks

Welson