Tool/software:
Hi, I have 2 questions. No.1:"TAC5112 working as I2S target, and if the I2S master(Controller) is in sleep mode(there is NO BCLK, FSYNC) for power saving. After then, the master would waked up(BCLK, FSYNC is returned) again.Would TAC5112 work again correctly? Or in this case,is it necessary to use TAC5112 under Master(Controller) mode with external CLK(for PLL generation of MCLK)? No.2:If TAC5112 as target mode, Can we use I2C transaction with no BCLK and FSYNC? I'm worry that internal CLK would not be generated without BCLK and FSYNC, and then I2C serial Rx/Tx would not work too. Best Regards.
