Tool/software:
Hi Team,
The pop noise will be triggered when switching between music play and pause (the attachment is the CODEC log file). Is there a register that can be adjusted?
Also, is there a register to clear the DAC buffer?
(I have tried it. When Codec DAC Channel Setup Register 2 is set to full mute, the codec output still has a pop noise when switching between play and pause.)
/* pasue to play */ [Rx][14:57:47.390] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:57:47.400] : tlv320aic_write_reg reg_addr(40) reg_data(10) /* play to pause */ [Rx][14:57:06.580] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:57:06.590] : tlv320aic_write_reg reg_addr(40) reg_data(1C) /* 1st play */ [Rx][14:58:55.418] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.418] : tlv320aic_write_reg reg_addr(01) reg_data(01) [Rx][14:58:55.428] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.438] : tlv320aic_write_reg reg_addr(1B) reg_data(00) [Rx][14:58:55.458] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.468] : tlv320aic_write_reg reg_addr(04) reg_data(07) [Rx][14:58:55.468] : tlv320aic_write_reg reg_addr(06) reg_data(14) [Rx][14:58:55.478] : tlv320aic_write_reg reg_addr(07) reg_data(00) [Rx][14:58:55.488] : tlv320aic_write_reg reg_addr(08) reg_data(00) [Rx][14:58:55.488] : tlv320aic_write_reg reg_addr(05) reg_data(93) [Rx][14:58:55.498] : tlv320aic_write_reg reg_addr(0B) reg_data(85) [Rx][14:58:55.498] : tlv320aic_write_reg reg_addr(0C) reg_data(83) [Rx][14:58:55.518] : tlv320aic_write_reg reg_addr(0D) reg_data(00) [Rx][14:58:55.518] : tlv320aic_write_reg reg_addr(0E) reg_data(80) [Rx][14:58:55.518] : tlv320aic_write_reg reg_addr(00) reg_data(01) [Rx][14:58:55.528] : tlv320aic_write_reg reg_addr(01) reg_data(08) [Rx][14:58:55.538] : tlv320aic_write_reg reg_addr(02) reg_data(01) [Rx][14:58:55.547] : tlv320aic_write_reg reg_addr(47) reg_data(32) [Rx][14:58:55.547] : tlv320aic_write_reg reg_addr(7B) reg_data(01) [Rx][14:58:55.557] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.567] : tlv320aic_write_reg reg_addr(3C) reg_data(02) [Rx][14:58:55.567] : tlv320aic_write_reg reg_addr(00) reg_data(2C) [Rx][14:58:55.577] : tlv320aic_write_reg reg_addr(01) reg_data(04) [Rx][14:58:55.587] : tlv320aic_write_reg reg_addr(00) reg_data(01) [Rx][14:58:55.587] : tlv320aic_write_reg reg_addr(0E) reg_data(08) [Rx][14:58:55.597] : tlv320aic_write_reg reg_addr(0F) reg_data(08) [Rx][14:58:55.607] : tlv320aic_write_reg reg_addr(12) reg_data(03) [Rx][14:58:55.607] : tlv320aic_write_reg reg_addr(13) reg_data(03) [Rx][14:58:55.617] : tlv320aic_write_reg reg_addr(09) reg_data(0C) [Rx][14:58:55.667] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.677] : tlv320aic_write_reg reg_addr(3F) reg_data(D4) [Rx][14:58:55.677] : tlv320aic_write_reg reg_addr(40) reg_data(1C) [Rx][14:58:55.697] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.707] : tlv320aic_write_reg reg_addr(41) reg_data(82) [Rx][14:58:55.707] : tlv320aic_write_reg reg_addr(42) reg_data(82) [Rx][14:58:55.767] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.767] : tlv320aic_write_reg reg_addr(40) reg_data(10) [Rx][14:58:55.777] : tlv320aic_write_reg reg_addr(00) reg_data(00) [Rx][14:58:55.777] : tlv320aic_write_reg reg_addr(41) reg_data(D6) [Rx][14:58:55.788] : tlv320aic_write_reg reg_addr(42) reg_data(D6)