TLV320AIC3254/CC3200AUDBOOST : MIC onbord to I2S to external BT module setting question

Austin Huang

Intellectual 490 points

Part Number: TLV320AIC3254
Other Parts Discussed in Thread: CC3200AUDBOOST, CC3200

Tool/software:

Hi Sir:

I have CC3200AUDBOOST EVB which is TLV320AIC3254 on that EVB.

https://www.ti.com/tool/CC3200AUDBOOST

Currently. the music data can streaming from smartphone to BT module over I2S --> to TLV320AIC3254 --> HPR/HPL

Based on EVK schematic. there is microphone on the EVB.

I just confused how to configure register make voice sound to I2S OUT???

Please hele to review the register setting. Thanks.

 if(mic & AUDIO_CODEC_MIC_ONBOARD)
 {
 reg1 |= 0x40; // MICBIAS powered up
 reg2 |= 0x00;
 reg3 |= 0x04;
 reg4 |= 0x04; // IN3R is routed to Right MICPGA with 10k resistance
 reg5 |= 0x40; // CM is routed to Right MICPGA via CM1R with 10k resistance
 reg6 |= 0x04; // IN3R input is weakly driven to common mode. Use when not routing IN3R to Left and Right MICPGA
 }
 tlv320aic_page_select(TI3254_PAGE_1); //Select Page 1
 tlv320aic_write_reg(TI3254_MICBIAS_CTRL_REG, reg1);
 //Route IN2L not routed
 tlv320aic_write_reg(TI3254_LEFT_MICPGA_P_CTRL_REG, reg2);
 //Route IN2R CM1L to LEFT_N with 10K input impedance
 tlv320aic_write_reg(TI3254_LEFT_MICPGA_N_CTRL_REG, reg3);
 //Route IN2R to RIGHT_P with 10K input impedance
 tlv320aic_write_reg(TI3254_RIGHT_MICPGA_P_CTRL_REG, reg4);
 //Route CM1R to RIGHT_M with 10K input impedance
 tlv320aic_write_reg(TI3254_RIGHT_MICPGA_N_CTRL_REG, reg5);
 tlv320aic_write_reg(TI3254_FLOAT_IP_CTRL_REG, reg6);
 //make channel gain 0dB, since 20K input
 //impedance is used single ended
 tlv320aic_write_reg(TI3254_LEFT_MICPGA_VOL_CTRL_REG, 0x00); // 0.0dB
 //Unmute Right MICPGA, Gain selection of 6dB to
 //make channel gain 0dB, since 20K input
 //impedance is used single ended
 tlv320aic_write_reg(TI3254_RIGHT_MICPGA_VOL_CTRL_REG, 0x00); // 0.0dB
 tlv320aic_page_select(TI3254_PAGE_0); // Select Page 0
 // Set I2S Mode and Word Length 16 bits
 //tlv320aic_write_reg(TI3254_AUDIO_IF_3_REG, 0x10); //BCLK is output from the device, WCLK is input to the device
 tlv320aic_write_reg(TI3254_LEFT_ADC_VOL_CTRL_REG, 0x68); // -12dB
 tlv320aic_write_reg(TI3254_RIGHT_ADC_VOL_CTRL_REG, 0x68); // -12dB
 //tlv320aic_page_select(TI3254_PAGE_0); // Select Page 0
 //Power up LADC/RADC
 tlv320aic_write_reg(TI3254_ADC_CHANNEL_SETUP_REG, 0xC0); // Left and Right Channel ADC is powered up
 //Unmute LADC/RADC
 tlv320aic_write_reg(TI3254_ADC_FINE_GAIN_ADJ_REG, 0x00); // Left and Right ADC Channel Un-muted. Left and Right ADC Channel Fine Gain = 0dB,
 

Austin

8 months ago

0 Jeff McPherson 8 months ago

TI__Mastermind 46995 points

Hi Austin,

Below is a script that we use on the standalone EVM for the codec that programs IN3 to record over I2S.

###############################################
# On-Board Differential Microphone
# ---------------------------------------------
# PowerTune mode PTM_R4 is used for high
# performance 16-bit audio. 
#
# For normal USB Audio, no hardware change
# is required.
#
# If using an external interface, SW2.4 and
# SW2.5 of the USB-ModEVM must be set to
# HI and clocks can be connected to J14 of
# the USB-ModEVM.
#
# IN3L/R is are routed differentially to the
# LADC.
###############################################



###############################################
# Software Reset
###############################################
#
# Select Page 0
w 30 00 00
#
# Initialize the device through software reset
w 30 01 01
#
###############################################



###############################################
# Clock Settings
# ---------------------------------------------
# The codec receives: MCLK = 11.2896 MHz,
# BLCK = 2.8224 MHz, WCLK = 44.1 kHz
###############################################
#
# Select Page 0
w 30 00 00
#
# NADC = 1, MADC = 2
w 30 12 81 82
#
###############################################



###############################################
# Signal Processing Settings
###############################################
#
# Select Page 0
w 30 00 00
#
# Set the ADC Mode to PRB_P1
w 30 3d 01
#
###############################################



###############################################
# Initialize Codec
###############################################
#
# Select Page 1
w 30 00 01
#
# Disable weak AVDD in presence of external
# AVDD supply
w 30 01 08
#
# Enable Master Analog Power Control
w 30 02 00
#
# Select ADC PTM_R4
w 30 3d 00
#
# Set the input powerup time to 3.1ms (for ADC)
w 30 47 32
#
# Set the REF charging time to 40ms
w 30 7b 01
#
###############################################



###############################################
# Recording Setup
###############################################
#
# Select Page 1
w 30 00 01
#
# Powerup MIC BIAS
w 30 33 40
#
# Route IN3L to LEFT_P with 10K input impedance
w 30 34 04
#
# Route IN3R to LEFT_M with 10K input impedance
w 30 36 04
#
# Unmute Left MICPGA
w 30 3b 00
#
# Unmute Right MICPGA
w 30 3c 00
#
# Select Page 0
w 30 00 00
#
# Power up LADC/RADC
w 30 51 c0
#
# Unmute LADC/RADC
w 30 52 00
#
###############################################

I'm not sure what the clock settings on this CC3200 EVM are, so that will need to be double checked. Also I believe the inputs are flipped, you need IN3R to be the positive input to the PGA, not the negative side. Regardless this is the best reference to get the write script, 95% should be right.

Best regards,
Jeff McPherson

0 Austin Huang 8 months ago in reply to Jeff McPherson

Intellectual 490 points

Hi Jeff:

Thank you for supporting. The clock is using BCLK(1.4112 Mhz from BT module) be PLL_CLKIN. the PLL register setting as below.

 tlv320aic_page_select(TI3254_PAGE_0);
 //Enable PLL. because BCLK is main CLK source and PLL Clock is CODEC_CLKIN
 tlv320aic_write_reg(TI3254_CLK_MUX_REG, 0x07); // PLL Clock is CODEC_CLKIN
 tlv320aic_write_reg(TI3254_CLK_PLL_P_R_REG, 0x96); // PLL is powered up, P=1, R=6
 tlv320aic_write_reg(TI3254_CLK_PLL_J_REG, 0x0A); // J=10
 tlv320aic_write_reg(TI3254_CLK_PLL_D_MSB_REG, 0x00);
 tlv320aic_write_reg(TI3254_CLK_PLL_D_LSB_REG, 0x00);
 tlv320aic_write_reg(TI3254_CLK_NDAC_REG, 0x83); // NDAC divider powered up, NDAC = 3
 tlv320aic_write_reg(TI3254_CLK_MDAC_REG, 0x85); // MDAC divider powered up, MDAC = 5
 tlv320aic_write_reg(TI3254_DAC_OSR_MSB_REG, 0x00); // DOSR = 128 = 0x0080
 tlv320aic_write_reg(TI3254_DAC_OSR_LSB_REG, 0x80); // DOSR = 128 = 0x0080
 tlv320aic_write_reg(TI3254_CLK_NADC_REG, 0x83); // NADC divider powered up, NADC = 3
 tlv320aic_write_reg(TI3254_CLK_MADC_REG, 0x85); // MADC divider powered up, MADC = 5
 tlv320aic_write_reg(TI3254_ADC_OSR_REG, 0x80); // AOSR = 128 = 0x0080((Use with PRB_R1 to PRB_R6, ADC Filter Type A)

About this one "IN3R to be the positive input to the PGA". Is configure Page1/ Register 0x37 for IN3R?

More questions.

1. I didn't found doc mention INxR/L routing data to I2S DOUT. If you have this kind of doc. if possible to share this.

2. The green circle in below diagram. P is Positive Terminal and N is meaning Negative Terminal???

if so. how to configure CMxL/R properly in page1/ reg 0x36 and 0x39??

Thanks

Austin

0 Jeff McPherson 8 months ago in reply to Austin Huang

TI__Mastermind 46995 points

Hi Austin,

The register you highlighted is correct. Once the connections are routed, the ADC is powered up, and the ADC is unmuted, the data will be sampled and automatically placed on to DOUT. There is no routing on the digital side required.

You are also correct that the positive terminal is indicated by a P. This is where you should route your audio signal to.

Best regards,
Jeff McPherson

0 Austin Huang 8 months ago in reply to Jeff McPherson

Intellectual 490 points

Hi Jeff:

Current status is voice from phone A to phone B which is connected BT module(with TI codec) is fine.

But the Voice can't send back from Mic on CC3200AUDBOOST to BT module to phone A to phone B.

how about page1/reg 0x39 and reg 0x3A??

Any comments will be appriciated?

Austin

0 Jeff McPherson 8 months ago in reply to Austin Huang

TI__Mastermind 46995 points

Hi Austin,

You mean you've verified the BT module is transmitting correctly but there is no Mic audio?

0x3A should not be relevant since you are connecting to the PGA to get to the ADC path.

0x39 contains input pins besides IN3R, which is what your mic is connected to so I wouldn't expect this register to matter either.

Could you check if the DOUT pin of the codec is toggling? If the ADC is properly powered up and unmuted you should see activity on DOUT.

Best regards,
Jeff McPherson

0 Austin Huang 8 months ago in reply to Jeff McPherson

Intellectual 490 points

Hi Jeff:

You mean you've verified the BT module is transmitting correctly but there is no Mic audio? YES

I will check the DOUT pin signal. BTW. here is CC3200AUDBOOS schematic

CC3200 AUDIO BOOSTERPACK Rev 3.0-A_SCH.pdf

Austin

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TLV320AIC3254/CC3200AUDBOOST : MIC onbord to I2S to external BT module setting question