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TPA3111D1: Inquiry about Hi-Z

Part Number: TPA3111D1

Tool/software:

Hi team,

I have three questions below

[Question 1]
If either OUTP or OUTN is shorted to PGND, at which stage does the output become Hi-Z?
A. DC Detect (Section 7.3.5)
B. Short-Circuit Protection and Automatic Recovery Feature (Section 7.3.6)

[Question 2]
If the output becomes Hi-Z due to process A., it is mentioned that a PVCC cycle is required for recovery.
Does this mean that PVCC must be lowered below a certain voltage and then restored to the supply voltage?
If so, what voltage should PVCC be lowered to, and for how long should it be maintained at that level?

[Question 3]
If the output becomes Hi-Z due to process B, it is mentioned that automatic recovery can occur by directly connecting FAULT and SD.
In this case, does the device recover when SD goes Low, or when it goes High?
Section 7.3.6 (Short-Circuit Protection and Automatic Recovery Feature) suggests recovery occurs at Low, while Section 5 (Pin Configuration and Functions) indicates that output is enabled at High. Which is correct?

Best regards,
Goto

  • Hey Goto, 

     Q1

    According to the DS, if a faulty cap on the output pin causes DC current to flow through the speaker, OUT_P_N becomes high impedance. This is the basis of the DC detect feature. 

    For short circuit protection, this is when there is an accidental short maybe between the output terminals or to GND on the output stage that essentially causes too much current to flow through to the output, triggering the FAULT pin into a low state and causing the output stage to enter into a Hi-Z state.

    I would say both cases cause the output terminal to enter Hi-Z.

      

    Q2 

    To power cycle PVCC, pull it to GND for a couple ms or when device is ready for playback in your application. Below is the minimum value PVCC can go. A pull to GND, and this must be a GND as close to as possible to GND (0V) should be considered. 

    Minimum operating voltage for PVCC should be well below 8V, but my advice is a pull to ground for a true power cycle.

    Q3

    SD pin should be pulled high to enable output playback and when this pin is low, it disables the output and causes a Hi-Z state at the output stage. When output is Hi-Z, the short-circuit protection latch is engaged which is why the Hi-Z state occurs in the first place. Shorting the SD to FAULT pins would allow the device to attempt recovery from the Hi-Z state and play through the electric short state discovered by the IC.

    If a true short circuit issue is experienced in the output and auto-recovery takes place, the noise from the rush of current would be present in the output playback. 

    The shutdown pin should be below 0.8V to be considered as 'LOW'. Typically this pin should be above 2V during output stage playback.

    I hope this was informative enough to your resolve.

    Regards,

    Ore.