TAS5558: Why write 0xDE will pull the VALID low?

Hey Charlie, 

I asked the previous question above because Reg xDE is a 32 bit register. Customer wrote b'00000000 or (x00) which is only 8-bits. This write instruction is only programming the first 8 bits of this register and not the rest, and of these bits, the first 7 bits are reserved and should not be written to. Unless by default these bits are x00, writing x00 to these registers is not advised because the IC could have its own default values written for these bits. I would recommend reading the previous values in these bits and writing to configurable bits according to what the customer desires. The only instruction that was successfully written with x0000 0000 command is to bit 24 of register xDE, which is not reserved. It is configured for AM Avoidance Mode. I have attached an image to point at the register bit that was configured in orange.

If configuring xDE, customer would need a 32-bit write and not just an 8-bit write. Pay attention to the registers marked 'X' in the image below. They are reserved and should be read before configuring the configurable bits to match what was present in the reserved bits instead of overwriting.

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image:

This shows the successfully configured bit in orange and the reserved bits of register xDE marked in pink.

I hope this was helpful and informative.

Regards,
Ore

Hey Charlie, 

This thread covers TAS5558 and not TAS5634EVM. I would like to clarify you are using TAS5558EVM, correct?

And thanks for providing the PPC screenshots. Changing Reg xDE on the fly while the output of the device is switching would mean the I2C command momentarily pauses the valid output and PWM output to implement the new register write and recover the device. This behavior is expected. I would recommend setting up the i2c writes on start up in comparison to changing on the fly.

Regards,
Ore.

Hey Charlie, 

The observations on xDE is expected. It should read all zeros by default.

The voltage level observed on the valid pin during i2c write to the IC is expected. This valid pin is dependent on the state of the pwm output. If pwm isnt correct or in a recovery state, the valid pin seems to indicate these states by going low. RegxDE influence the pwm output features directly. It is hard to avoid the momentary recovery of the pwm signal during i2c writes. As you can see the datasheet suggests there's a time lapse that implements a valid logic high or low. This time lapse is unavoidable. The DS doesn't mention what happens in the time lapse but your observations show what the spec reports. There is nowhere in the DS that suggests the PWM output is continuous during a VALID high-low transition. The VALID pin seems internally connected to the PWM channels so a time lapse would show up on both lines like you've observed.

Only option is to decide what configurable features are wanted from regxDE, do the same with other re-written registers, save all new configurations into a file and execute all desired configurations at once. Pwm reconfiguring on the fly would cause an invalid state and recover the pwm output if the i2c write is valid, which it is.

I would like to clarify, pop noise is sourced from mismatch on AC components (caps and inductors) on either the input/output terminal line configurations.

Regards,

Ore.